Transcript
APPLICATION NOTE
RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 release note
R01AN2200EJ0203 Rev.2.03 Jul 08, 2015
Introduction This document describes the RZ/A1H CMSIS-RTOS RTX BSP (RTK772100BC00000BR) (which is a package hereinafter called the BSP).
Operation Check Boards GENMAI CPU board (RTK772100BC00000BR) GENMAI optional board (RTK7721000B00000BR)
History of Changes to the Previous Versions Ver.
No.
Type
Description
V2.03
1
ALL
2
DMA
3
RIIC
Fixed an issue where it was lacking in a dummy reading procedure of a stand-by control register after module stop release. Fixed an issue which doesn't control exclusion when calling API from an interrupt context. Fixed an issue which sometimes makes the restart condition occur twice in case of continuous transfer. Fixed the error return processing in case of continuous transfer. Fixed an issue which forwarded at DMA channel 0, not an unused DMA channel when specified DMA transmission. Fixed an issue which after the initialization release of SRC, head of the data that converted by SRC becomes mute. Fixed an issue which after calling SCUX_IOCTL_SET_FLUSH_STOP, tail of the data that converted by SRC isn't output. Fixed an issue which the color different from origin is output in case of the output setting to VDC5 channel 1. Fixed an issue which the video input sample does not work in case of the output setting to VDC5 channel 1. Changed the procedure of flash writing. The procedure which waits for input of "y" before flash writing was eliminated.
4 5
SCIF
6
SCUX
7
8
VDC5
9
10
Sample program
R01AN2200EJ0203 Jul 08, 2015
Rev.2.03
Remarks
Change the settings description of SW2-1 in the README file to OFF.
See "3.5.3 Serial Flash Write" See "3.6.3 NOR Flash Write"
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RZ/A1H Group
CMSIS-RTOS RTX BSP V2.03 release note A transfer order to the sleep mode in the Idle thread was changed for the processing which considered use of a software stand-by mode.
11
12
V2.02
13 1 2 3
Kernel_HW dependence
VDC5(Display) Sample program Kernel_HW dependence
4
V2.01
5 1
Kernel_HW dependence
2
3
5
SCUX
7
8 9
SCIF
10
R01AN2200EJ0203 Jul 08, 2015
OS update: Corresponding to Tick-less operation. Update the version of RZ/A1H Group Video Display Controller 5 Driver, in Ver.1.00 Support NOR flash boot(ULINK2 write) Fixed an issue where not waiting for a status change after L2 cache operation Fixed an issue where a data abort error occurs when interrupt ID is 1022 or 1023 Add restrictions(No.1,No.2) Added support for CMSIS-RTOS RTX V4.74 1. The duplicate 'iodefines' header files in each Renesas project have been factored-out into a single '¥CMSIS_RTOS_RTX¥RTOS¥RTX¥Boa rds¥Renesas¥RZ_A1H_GENMAI¥iodefi nes' directory. 2. Some common header files in the Examples projects have been factored-out into a new '¥CMSIS_RTOS_RTX¥RTOS¥RTX¥Boa rds¥Renesas¥RZ_A1H_GENMAI¥INC' directory, for Renesas RZ_A1H_GENMAI Board examples. Changed the code generation option (--no_unaligned_access (unaligned access is disable)) to disable setting. Changed the attribute of memory area into secure to non-secure.
see "4.Restrictions"
Access method is changed according to the peripheral device which accesses a L2 cache by non-secure mode.
Changed the memory attribute of internal RAM non-cache area into cache strong order to non-cache normal order. Fixed an issue where the interrupt response stops when the interrupt controller reads the unjust interrupt ID. Added an error notification when an error occurs in a situation without a request. Fixed an issue where an error occurs when SCUX_IOCTL_SET_START is executed at the 65536th time. Added the API of driver version getting. Fixed an issue where return value is not byte count of receive but ECANCELD when SCIF reception is canceled during the reception. Added the API of driver version getting.
4
6
OS update: Corresponding to NEON.
Corrected file: RTX_Conf_CM.c of a sample folder. The reference document :RZ/A1H user's manual hardware Rev.2.00 "55.3.1 Sleep Mode" Corrected file: OS and system_Renesas_RZ_A1.c of a sample folder. Corrected file: OS.
Rev.2.03
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CMSIS-RTOS RTX BSP V2.03 release note
11 12 13 14
ADC SSIF RSPI SOUND
15 16
VDC5(Display)
17 18
DMA
19 20
21
22 23
V2.00
1
RIIC
Sample program SCUX
2 E2.04
1
Sample program
2
3 4
Touch
5
DMA
6
VDC5(Display)
7 8
9
SOUND
10 11
SCUX
12
13
R01AN2200EJ0203 Jul 08, 2015
Rev.2.03
Added the API of driver version getting. Added the API of driver version getting. Added the API of driver version getting. Fixed an issue that volume can't un-mute after volume is muted. Added the API of driver version getting. Changed the AppDrv_Disp_GraphicsCreateSurface function can handle layer 2, 3. Added the API of driver version getting. Fixed an issue where task context is destroyed by the unjust completion processing of interruption in an interrupt handler. Added the API of driver version getting. Changed the memory attribute at the time of accessing to an external bus into cache strong order to non-cache normal order. Fixed an issue where task context is destroyed by the unjust completion processing of interruption in an interrupt handler. Added the API of driver version getting. Updated the build procedure of sample program. Fixed an issue where set the bypass mode in synchronous mode. Fixed an issue where not output audio to operating in bypass mode ON the DVU. Improved the serial flash boot (ULINK2 write) procedure. Changed the baud rate of RIIC driver set in the sample program ex1 to recommended value* of 100kbps. Changed the folder. Added support for LCD panel output interface (ch0) connection. Corrected an error in remaining size at the time of cancel. Changed the default output of sample program to Analog RGB (ch0). Supported for LCD panel output interface (ch0) connection. Fixed an issue where communication error of Touch panel by after initialization to LCD panel. Fixed an issue where cannot be set 32bit word size to WM8978. Added MIC volume setting function. Fixed an issue where cannot be synchronous motions of SRC of multiple. Fixed an issue where lamp mode operation immediately after the initialization is muted behavior. Fixed an issue where waiting time of the lamp start is not working properly.
Because of CMSIS-RTOS RTX V4.74 correspondence
*see RZ/A1H Group User's Manual: Hardware (Rev.1.00)
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14 15 16 17
18 19
20 21
22 23 E2.03
1
2 3
Kernel_HW dependence SOUND
Sample program VDC5 (Display)
4
E2.02
1 2 3
VDC5 (Display) Key SSIF
4
5
6 E2.01
1 2 3 4
ADC SCUX Kernel_HW dependence SSIF
5 6
R01AN2200EJ0203 Jul 08, 2015
Rev.2.03
Corrected the register initial value. Corrected the range of parameter check. Corrected the setting the latency value. Fixed an issue where does not operate normally when increased the number of audio channels during operation. Fixed an issue where does not release the MIX in error handling. Fixed an issue where returns a parameter error for the channel that is not being used in the processing of related MIX. Fixed an issue where left and right reversal of cancellation after operation. Fixed an issue where no sound from SSIF2 and SSIF1 by SSIF012 to output the data transfer route. Fixed an issue where occurs abort If do cancel processing in STOP state. Fixed an issue where compiled with -O3 -Otime. Newly added component (alpha version)
Added support for serial flash boot (ULINK2 write). Fixed an issue where analog RGB outputs could not be specified. Fixed an issue where all layers were discarded regardless of the layer specified for the surface discard process. Newly added component Newly added component Corrected an error in the frequency divisor calculation formula for TDM mode. Fixed an issue where the SSIF driver could not be unregistered because the driver's internal status was changed after double registration error. Fixed an issue where playback or recording data had a possibility of being horizontally inverted by full-duplex operation. Fixed an issue where a request could not be normally cancelled. Newly added component Newly added component Added support for the gets() function.
The ex1 sample and SCUX driver operation sample have been upgraded to samples which use a sound driver.
E2.02 restriction
E2.01 restriction
E2.01 restriction
Fixed an issue where the channel 0 initialization parameter was applied to all the channels for the SSIF driver. Fixed an issue where reception was disabled. Fixed an issue where there was not enough exclusive control over access to the serial sound noise canceller control register for the SSIF driver.
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CMSIS-RTOS RTX BSP V2.03 release note
7
E2.00
8
RSPI
9
Touch
1 2
Touch Kernel_HW dependence
3
4
DMA
5 6
RIIC
7
R01AN2200EJ0203 Jul 08, 2015
Rev.2.03
Fixed an issue where an error occurred when the bit clock settings unavailable for the GENMAI board were selected during slave mode. Corrected the wrong member name for the initialization parameter. Corrected the function setting procedure for the multi-purpose pins according to the updated RZ/A1H user's manual. Newly added component Eliminated noise included in the WM8978 playback sound. Corrected the CPG-related macro definitions according to the updated RZ/A1H user's manual. Fixed an issue where an interrupt factor was not cleared if a DMA transfer was already completed when the R_DMA_Cancel function of the DMA driver was executed for DMA transfer cancelling. Corrected the USB resource attributes for the DMA driver. Corrected the clock calculation formula for communication rates according to the updated RZ/A1H user's manual. Fixed an issue where large quantities of data had a possibility of being erroneously transmitted due to insufficient exclusive control.
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CMSIS-RTOS RTX BSP V2.03 release note
Table of Contents 1.
Package Contents ............................................................................................................................. 7
2.
Folder Structure ................................................................................................................................. 9
3.
Information about the BSP .............................................................................................................. 11
4.
Restrictions ...................................................................................................................................... 22
5.
Precautions ..................................................................................................................................... 23
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1.
CMSIS-RTOS RTX BSP V2.03 release note
Package Contents
This package contains the following items:
1.1
Software
- Source codes No. Name 1 A set of BSP source codes - Configuration files No. Name 1 PARTNER-Jet CONFIG file (for boot mode 0 (NOR flash)) 2 PARTNER-Jet CONFIG file (for boot mode 3 (serial flash))
1.2
Title
1
RZ/A1H CMSIS-RTOS RTX BSP V2.03 release note
2
RZ/A1H CMSIS-RTOS RTX BSP BSP(Kernel_HW dependence) User's Manual RZ/A1H CMSIS-RTOS RTX BSP DMA Driver User's Manual RZ/A1H CMSIS-RTOS RTX BSP RIIC Driver User's Manual RZ/A1H CMSIS-RTOS RTX BSP RSPI Driver User's Manual RZ/A1H CMSIS-RTOS RTX BSP SCIF Driver User's Manual RZ/A1H CMSIS-RTOS RTX BSP SSIF Driver User's Manual RZ/A1H CMSIS-RTOS RTX BSP ADC Driver User's Manual RZ/A1H CMSIS-RTOS RTX BSP Touch Panel Sample Application Note RZ/A1H CMSIS-RTOS RTX BSP Key Input Switch Sample Application Note RZ/A1H CMSIS-RTOS RTX BSP VDC5 (Display) Sample Application Note Video Display Controller 5 Driver User's Manual Digital Video Decoder Driver User's Manual RZ/A1H CMSIS-RTOS RTX BSP
4 5 6 7 8 9 10 11 12 13 14
File/folder name JETARM.CFG (under the "BootMode0_NFlash" folder) JETARM.CFG usrflash_arm.MON (under the "BootMode3_SFlash" folder)
Documents
- Manuals No.
3
Folder name CMSIS_RTOS_RTX
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Rev.2.03
Revision No. -
Rev.1.12
Rev.1.12 Rev.1.11 Rev.1.12 Rev.1.10 Rev.1.11 Rev.1.04 Rev.1.02 Rev.1.02 Rev.1.03 Rev.1.00 Rev.1.00 Rev.1.03
File name [J] r01an2200jj0203_rza1h.pdf [E] r01an2200ej0203_rza1h.pdf (this document) [J] r01us0087jj0112_rza1h.pdf [E] r01us0087ej0112_rza1h.pdf [J] r01us0086jj0112_rza1h.pdf [E] r01us0086ej0112_rza1h.pdf [J] r01us0088jj0111_rza1h.pdf [E] r01us0088ej0111_rza1h.pdf [J] r01us0089jj0112_rza1h.pdf [E] r01us0089ej0112_rza1h.pdf [J] r01us0090jj0110_rza1h.pdf [E] r01us0090ej0110_rza1h.pdf [J] r01us0093jj0111_rza1h.pdf [E] r01us0093ej0111_rza1h.pdf [J] r01us0091jj0104_rza1h.pdf [E] r01us0091ej0104_rza1h.pdf [J] r01an2015jj0102_rza1h.pdf [E] r01an2015ej0102_rza1h.pdf [J] r01an2068jj0102_rza1h.pdf [E] r01an2068ej0102_rza1h.pdf [J] r01an2070jj0103_rza1h.pdf [E] r01an2070ej0103_rza1h.pdf [J] r01an1822jj0100_rza1h.pdf [E] r01an1822ej0100_rza1h.pdf [J] r01an1823jj0100_rza1h.pdf [E] r01an1823ej0100_rza1h.pdf [J] r01us0092jj0103_rza1h.pdf Page 7 of 24
RZ/A1H Group 15 16 17
CMSIS-RTOS RTX BSP V2.03 release note
SCUX Driver User's Manual RZ/A1 Group CMSIS-RTOS RTX Expansion Guide RZ/A1H CMSIS-RTOS RTX BSP IOIF User's Manual RZ/A1H CMSIS-RTOS RTX BSP SOUND Driver Application Note
Rev.1.01 Rev.1.02 Rev.1.02
[E] r01us0092ej0103_rza1h.pdf [J] r01an2134jj0101_rza1h.pdf [E] r01an2134ej0101_rza1h.pdf [J] r01an2159jj0102_rza1h.pdf [E] r01an2159ej0102_rza1h.pdf [J] r01an2158jj0102_rza1h.pdf [E] r01an2158ej0102_rza1h.pdf
- Sample operation procedures No. Sample name File name Storage destination 1 ex1 [J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt [E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ex1 2 ADC [J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt [E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ADC¥sa mple1 3 Key Input [J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt Switch [E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ADC¥sa mple2 4 SCUX [J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt [E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥SCUX¥s ample1 5 Touch Panel [J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt [E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥TP¥sam ple1 6 VDC5 [J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt (Display) [E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥Display¥ sample1
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2.
CMSIS-RTOS RTX BSP V2.03 release note
Folder Structure
Below are the folder structure for this package and details about its contents. Top +-- Documentation | +-- ReleaseNote : Release note | +-- Specification : Documents (see Section 1.2.) +-- Software +-- BSP | +-- CMSIS_RTOS_RTX : BSP source folder | | .project | | README.txt | +-- Include | +-- RTOS | +-- RTX | | License.txt | +-- Boards | | +-- ARM | | +-- Keil | | +-- Renesas | | +--RZ_A1H_GENMAI | | +-- C++_ex1 : ARM sample | | +-- C++_ex2 : ARM sample | | +-- Mail : ARM sample | | +-- Message : ARM sample | | +-- INC : Common header | | +-- iodefines : Chip dependence header | | +-- RenesasBSP : BSP driver | | | | version.txt : BSP version information | | | +-- drv_inc : Driver header | | | +-- drv_lib : Driver library | | | +-- drv_src | | | +-- adc : ADC driver | | | +-- display : VDC5 (Display) driver | | | +-- dma : DMA driver | | | +-- ioif : IOIF | | | +-- riic : RIIC driver | | | +-- rspi : RSPI driver | | | +-- scif : SCIF driver | | | +-- scux : SCUX driver | | | +-- sound : SOUND driver | | | +-- ssif : SSIF driver | | +-- RenesasBSP_example : BSP sample TOP | | | +-- ADC | | | | +-- sample1 : Main body of the ADC driver operation sample program | | | | +-- sample2 : Main body of the Key Input Switch sample program | | | +-- Display : Main body of the VDC5 (Display) sample program | | | | +-- library : VDC5 (Display) sample driver | | | | +-- sample1 : VDC5 (Display) operation sample program | | | +-- ex1 : Main body of the ex1 sample program | | | +-- ForNFlash : NFlash write tool (for ULINK2) | | | +-- ForSFlash : SFlash write tool (for ULINK2) | | | +-- inc : Common header for the samples | | | +-- lib : Common library for the samples | | | +-- SCUX | | | | +-- sample1: Main body of the SCUX driver operation sample program
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| | | +--TP | | | +-- lib | | | +-- sample1 | | +-- RTX_ex1 | | +-- RTX_ex2 | | +-- RTX_Traffic | | +-- Semaphore | +-- Doc | +-- INC | +-- LIB | +-- SRC | +-- Templates +-- CFG +-- PARTNER-Jet +-- BootMode0_NFlash +-- BootMode3_SFlash
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Rev.2.03
: Main body of the Touch Panel sample program : Touch Panel sample driver : Touch Panel operation sample program : ARM sample : ARM sample : ARM sample : ARM sample
: PARTNER-Jet configuration file : Used for boot mode 0 : Used for boot mode 3
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3.
CMSIS-RTOS RTX BSP V2.03 release note
Information about the BSP
The requirements for using the BSP source codes are as follows.
3.1
Software Base OS RTX for Cortex-A9 (24th February 2015)
Drivers IOIF, DMA, SCIF, SSIF, RSPI, RIIC, ADC, SCUX, SOUND, VDC5 (Display)
Samples ex1, Touch Panel, ADC, SCUX, VDC5 (Display), Key Input Switch
3.2
Tools Build environment DS-5 (V5.16)
Execution environment ULINK2 (v2.01)
3.3
Hardware Device RZ/A1H
Target board
Board name GENMAI CPU board (RTK772100BC00000BR)
Operation mode Clockin = 13.33 MHz, CKIO = 66.67 MHz I Clock = 400.00 MHz G Clock = 266.66 MHz B Clock = 133.33 MHz P1 Clock = 66.67 MHz P0 Clock = 33.33 MHz
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Setup method *For information about the positions of the jumpers and switches, refer to Figure 1 External View of the Target Board.
Table 1 Connector Hookup Part No.
Connected equipment
J6
Speaker (headset)
J17
RS-232C cable
J22
JTAG cable
J25
AC adapter
Table 2 Debug Serial Port Settings Baud rate
115200
Character length
8 bits
Parity
None
Stop bit
1 bit
Flow control
None
Line feed code
CR
Table 3 Target Board Jumper Settings Setting Jumper
R01AN2200EJ0203 Jul 08, 2015
Boot mode 0
Boot mode 3
JP1
Open
Open
JP2
1-2
1-2
JP3
1-2
1-2
JP4
Open
Open
JP5
2-3
1-2
JP6
2-3
2-3
JP7
1-2
1-2
JP8
Open
1-2
JP9
1-2
1-2
JP10
1-2
1-2
JP11
1-2
1-2
JP12
1-2
1-2
JP13
1-2
1-2
JP14
2-3
2-3
JP15
1-2
1-2
JP16
1-2
1-2
Rev.2.03
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CMSIS-RTOS RTX BSP V2.03 release note JP17
1-2
1-2
JP18
1-2
1-2
JP19
1-2
1-2
JP20
1-2
1-2
JP21
1-2
1-2
JP22
1-2
1-2
Table 4 Target Board Switch Settings (SW1) Setting
DIP switch
Boot mode 0
Boot mode 3
SW1-1
ON
OFF
SW1-2
ON
ON
SW1-3
ON
OFF
SW1-4
ON
ON
SW1-5
ON
ON
SW1-6
ON
ON
*The operating frequency is 128 MHz when SW1-4 is in the OFF position. (It is 400 MHz when SW1-4 is in the ON position which is the default position.)
Table 5 Target Board Switch Settings (SW2) Setting
DIP switch
Boot mode 0
Boot mode 3
SW2-1
ON
ON
SW2-2
ON
ON
SW2-3
ON
ON
SW2-4
ON
ON
Table 6 Target Board Switch Settings (SW3)
R01AN2200EJ0203 Jul 08, 2015
Setting
DIP switch
Boot mode 0
Boot mode 3
SW3-1
OFF
OFF
SW3-2
OFF
OFF
SW3-3
OFF
OFF
SW3-4
OFF
OFF
SW3-5
OFF
OFF
SW3-6
OFF
OFF
SW3-7
OFF
OFF
SW3-8
OFF
OFF
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J6 JP20 JP10
JP14
JP18 J25
SW3 SW2
JP17
JP19
JP15
J22 JP9
JP8 JP6
JP22 JP11
JP7
JP21 JP3
JP4
J17 SW1
JP2
JP13
JP5
JP12 JP1 JP16
Figure 1 External View of the Target Board
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3.4
ex1 Sample Operation Check (On-chip RAM Download)
3.4.1 1.
CMSIS-RTOS RTX BSP V2.03 release note
Build Process Create a new DS-5 workspace*1. A)
Create a work folder*2 in an arbitrary position.(You can decide the folder name freely)
B)
Copy the source files (all the file groups under the BSP source folder) to the folder created in step A). e.g.) The folder structure when making the work folder "C:¥Workspase". C: +-- Workspace +--CMSIS_RTOS_RTX | .project | README.txt
The file group under the BSP source folder
+-- Include +-- RTOS C)
Start DS-5.
D)
Select the [File] menu --> [Switch Workspace] --> [Other...].
E)
Click [Browse...] in the [Workspace Launcher] dialog box.
F)
Select the folder created in step A). Then, click [OK].
G) DS-5 automatically restarts and the [Welcome to DS-5] screen appears. H)
Close the [Welcome to DS-5] screen.
*1:Even if there is an existing workspace, be sure to create a new one instead of using the existing work space. *2: be sure to create a work folder in the place near the route of a drive so that the number restrictions of characters of the pathname of Windows (260 characters) may not be exceeded. 2.
Select the [Window] menu --> [Show View] --> [Project Explorer].
3.
Right-click the [Project Explorer] view and select [Import...]
4.
In the [Select an import source] of [Import] dialog box, select [General] --> [Existing Projects into Workspace]. Then, click the [Next] button.
5.
In the [Import] dialog box, check [Select root directory] and then click [Browse...].
6.
In the [Reference Folder] dialog box, select the source-file copy destination (folder name created in step 1-A)) and then click [OK].
7.
Check "CMSIS_RTOS_RTX" is selected in the [Projects] list and then click [OK] in the [Import] dialog box.
8.
Remove the check mark from [Copy projects into workspace] in the [Import] dialog box.
9.
Click [Finish] in the [Import] dialog box.
10. Again, right-click the [Project Explorer] view and select [Import...] 11. In the [Select an import source] of [Import] dialog box, select [General] --> [Existing Projects into Workspace]. Then, click the [Next] button. 12. In the [Import] dialog box, check [Select root directory] and then click [Browse...].
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13. In the [Reference Folder] dialog box, select a "RTOS" folder which is under the "CMSIS_RTOS_RTX" folder and then click [OK]. 14. Click [Deselect All] in the [Import] dialog box. 15. Add check marks only to these items in the [Projects] list: - DMA_drv - IOIF - ex1 - RTX_CA9_Library - RIIC_drv - RSPI_drv - SCIF_drv - SSIF_drv - SOUND_drv 16. Remove the check mark from [Copy projects into workspace] in the [Import] dialog box. 17. Click [Finish] in the [Import] dialog box. 18. Right-click the "ex1" project displayed in the [Project Explorer] view. Then, select [Clean Project] 19. Right-click like step 18 and then click [Build Project]. The file below is created.
RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ex1¥ex1.axf
3.4.2
Connection Setup for Debug
Note: Before completing the connection, create an executable file for the ex1 sample (by referring to Section 3.4.1 Build Process).
*Take the steps below while the C/C++ perspective is displayed. 1.
Connect ULINK2 to the target board and PC.
2.
Start DS-5.
3.
Select [Run] --> [Debug Configurations...].
4.
Select [ex1-RZ_A1H_GENMAI] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box.
5.
Select the [Connection] tab. Select "Debug Cortex-A9" as a target (see below). Renesas --> RZ/A1H R7S721001 --> Bare Metal Debug --> Debug Cortex-A9
6.
In the [Connection] tab, select "ULINK2" for Target Connection.
7.
In the [Connection] tab, click "Browse..." (on the lower right of the screen) for connection.
8.
Select the desired connection destination from among the candidate destinations displayed in the [Connection Browser] dialog box (if one device is to be connected, only one candidate destination is displayed). Then, click [Select].
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Click [Apply].
10. Click [Close].
3.4.3
Sample Execution
*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 6 for boot mode 0.
*Take the steps below while the DS-5 Debug perspective is displayed. 1.
Connect speaker to J6 of a CPU board and connect PC to J17 of a CPU board by RS-232C cable.
2.
Start DS-5.
3.
Select [Run] --> [Debug Configurations...].
4.
Select [ex1-RZ_A1H_GENMAI] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and ULINK2 are connected and the downloading of the executable file begins.)
5.
Click the [Continue] button (green playback mark) in the [Debug Control] view.
3.4.4
Sample Execution Result
The execution of the sample begins. Confirm the execution results by using the RS-232C output connected to J17. There should be sounds coming from the speakers connected to J6 ("MIGI" from the right side and "HIDARI" from the left side). (They should be repeated three times.)
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3.5 3.5.1
CMSIS-RTOS RTX BSP V2.03 release note
ex1 Sample Operation Check (Serial Flash Boot) Build Process
1.
Perform steps 1 through 17 described in Section 3.4.1.
2.
Right-click the "ex1" project displayed in the [Project Explorer] view. Then, select [Properties]
3.
Select [Settings] for [C/C++ Build] in the [Properties] dialog box.
4.
In the [Tool Settings] tab, select [ARM Linker] --> [Image Layout].
5.
Click [Browse...] for [Scatter file], select the path below, and then click [OK]. RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ex1¥scatter_sflashboot .scat
6.
Right-click "ex1" project displayed in the [Project Explorer] view. Then click [Clean Project]
7.
Rihgt-click like step 6 and then click [Project] menu --> [Build All]. The file below is created. RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ex1¥FlashImage¥ex1.bin
3.5.2
Connection Setup for Serial Flash Write
Note: Before completing the connection, create an executable file for the ex1 sample (by referring to Section 3.5.1 Build Process).
*Take the steps below while the C/C++ perspective is displayed. 1.
Connect ULINK2 to the target board and PC.
2.
Start DS-5.
3.
Select [Run] --> [Debug Condigurations...].
4.
Select [ex1_SFWrite-RZ_A1H_GENMAI] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box.
5.
Select the [Connection] tab. Select "Debug Cortex-A9" as a target (see below). Renesas --> RZ/A1H R7S721001 --> Bare Metal Debug --> Debug Cortex-A9
6.
In the [Connection] tab, select "ULINK2" for Target Connection.
7.
In the [Connection] tab, click "Browse..." (on the lower right of the screen) for connection.
8.
Select the desired connection destination from among the candidate destinations displayed in the [Connection Browser] dialog box (if one device is to be connected, only one candidate destination is displayed). Then, click [Select].
9.
Click [Apply].
10. Click [Close].
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3.5.3
CMSIS-RTOS RTX BSP V2.03 release note
Serial Flash Write
*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 6 for boot mode 3.
*Take the steps below while the DS-5 Debug perspective is displayed. 1. Start DS-5. 2. Select [Window] --> [Show View] --> [App Console]. (The [App Console] view appears.) 3. Select [Run] --> [Debug Configurations...]. 4. Select [ex1_SFWrite-RZ_A1H_GENMAI] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and ULINK2 are connected and the downloading of the binary file begins.) 5. The message below appears in the [App Console] view, indicating that the write operation has been completed. Flash Programming Complete 6. Select [Window] --> [Show View] --> [Debug Control]. 7. In the [Debug Control] view, select [ex1_SFWrite-RZ_A1H_GENMAI] and right-click. Select [Disconnect from Target]. (ULINK2 is disconnected from the target.) 8. Power off the target board.
3.5.4
Sample Execution
*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 6 for boot mode 3.
1. Connect speaker to J6 of a CPU board and connect PC to J17 of a CPU board by RS-232C cable. 2. Power on the target board.
3.5.5
Sample Execution Result
The execution of the sample begins. Confirm the execution results by using the RS-232C output connected to J17. There should be sounds coming from the speakers connected to J6 ("MIGI" from the right side and "HIDARI" from the left side). (They should be repeated three times.)
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CMSIS-RTOS RTX BSP V2.03 release note
ex1 Sample Operation Check (NOR Flash Boot) Build Process
1.
Perform steps 1 through 17 described in Section 3.4.1.
2.
Right-click the "ex1" project displayed in the [Project Explorer] view. Then, select [Properties]
3.
Select [Settings] for [C/C++ Build] in the [Properties] dialog box.
4.
In the [Tool Settings] tab, select [ARM Linker] --> [Image Layout].
5.
Click [Browse...] for [Scatter file], select the path below, and then click [OK]. RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ex1¥scatter_nflashboo t.scat
6.
Right-click "ex1" project displayed in the [Project Explorer] view. Then click [Clean Project]
7.
Rihgt-click like step 6 and then click [Project] menu --> [Build All]. The file below is created. RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_GENMAI¥RenesasBSP_example¥ex1¥FlashImage¥ex1.bin
3.6.2
Connection Setup for Serial Flash Write
Note: Before completing the connection, create an executable file for the ex1 sample (by referring to Section 3.6.1 Build Process).
*Take the steps below while the C/C++ perspective is displayed. 1.
Connect ULINK2 to the target board and PC.
2.
Start DS-5.
3.
Select [Run] --> [Debug Condigurations...].
4.
Select [ex1_NFWrite-RZ_A1H_GENMAI] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box.
5.
Select the [Connection] tab. Select "Debug Cortex-A9" as a target (see below). Renesas --> RZ/A1H R7S721001 --> Bare Metal Debug --> Debug Cortex-A9
6.
In the [Connection] tab, select "ULINK2" for Target Connection.
7.
In the [Connection] tab, click "Browse..." (on the lower right of the screen) for connection.
8.
Select the desired connection destination from among the candidate destinations displayed in the [Connection Browser] dialog box (if one device is to be connected, only one candidate destination is displayed). Then, click [Select].
9.
Click [Apply].
10. Click [Close].
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3.6.3
CMSIS-RTOS RTX BSP V2.03 release note
NOR Flash Write
*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 6 for boot mode 0.
*Take the steps below while the DS-5 Debug perspective is displayed. 1. Start DS-5. 2. Select [Window] --> [Show View] --> [App Console]. (The [App Console] view appears.) 3. Select [Run] --> [Debug Configurations...]. 4. Select [ex1_NFWrite-RZ_A1H_GENMAI] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and ULINK2 are connected and the downloading of the binary file begins.) 5. The message below appears in the [App Console] view, indicating that the write operation has been completed. Flash Programming Complete 6. Select [Window] --> [Show View] --> [Debug Control]. 7. In the [Debug Control] view, select [ex1_NFWrite-RZ_A1H_GENMAI] and right-click. Select [Disconnect from Target]. (ULINK2 is disconnected from the target.) 8. Power off the target board.
3.6.4
Sample Execution
*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 6 for boot mode0.
1. Connect speaker to J6 of a CPU board and connect PC to J17 of a CPU board by RS-232C cable. 2. Power on the target board.
3.6.5
Sample Execution Result
The execution of the sample begins. Confirm the execution results by using the RS-232C output connected to J17. There should be sounds coming from the speakers connected to J6 ("MIGI" from the right side and "HIDARI" from the left side). (They should be repeated three times.)
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CMSIS-RTOS RTX BSP V2.03 release note
Restrictions
None
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Precautions
No.
Type
Precaution
1
Kernel_HW dependence
Both the debug serial port (printf output destination) and the SCIF driver's channel 2 use the same port. Note that opening channel 2 results in contention.
2
SCUX, SSIF
If an SSIF channel is selected as the output destination with the SCUX driver, opening this channel with the SSIF driver results in contention. Thus, use exclusive mode for channel access.
3
VDC5 (Display)
If the serial flash boot and analog RGB output (ch 1) are used in combination, contention occurs among the pins. Thus, do not use them.
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Website and Support • Renesas Electronics Website http://www.renesas.com/ • Inquiries http://www.renesas.com/contact/
All trademarks and registered trademarks are the property of their respective owners.
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Revision History Rev. 1.00 1.01
Date Jul 18, 2014 Sep 26, 2014
Page all 1 6 -
1.02
Dec 25, 2014
2.03
Jul 08, 2015
all 1 6 9 20 22 all 1 6 18 20 22
Description Summary First Edition issued Updated the BSP version(V2.00→V2.01) Updated "History of Changes to the Previous Versions" Updated "1.2. Documents" Updated by CMSIS-RTOS RTX V4.74 correspondence - "1.1 Software" - "2.Folder Structure" - "3.1 Software" - "3.4.1 Build Process" - "3.5.1 Build Process " Updated the BSP version(V2.01→V2.02) Updated "History of Changes to the Previous Versions" Updated "1.2. Documents" Updated "2.Folder Structure" Added "3.6. ex1 Sample Operation Check (NOR Flash Boot)" Updated "4.Restrictions" Updated the BSP version(V2.02→V2.03) Updated "History of Changes to the Previous Versions" Updated "1.2. Documents" Updated "3.5. ex1 Sample Operation Check (Serial Flash Boot)" Updated "3.6. ex1 Sample Operation Check (NOR Flash Boot)" Updated "4.Restrictions"
A-1
General Precautions in the Handling of MPU/MCU Products The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products. • 1.
Handling of Unused Pins
Handle unused pins in accordance with the directions given under Handling of Unused Pins in the manual. The input pins of CMOS products are generally in the high-impedance state. In operation with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. Unused pins should be handled as described under Handling of Unused Pins in the manual. • 2.
Processing at Power-on
The state of the product is undefined at the moment when power is supplied. The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified. • 3.
Prohibition of Access to Reserved Addresses
Access to reserved addresses is prohibited. The reserved addresses are provided for the possible future expansion of functions. Do not access these addresses; the correct operation of LSI is not guaranteed if they are accessed. • 4.
Clock Signals
After applying a reset, only release the reset line after the operating clock signal has become stable. When switching the clock signal during program execution, wait until the target clock signal has stabilized. When the clock signal is generated with an external resonator (or from an external oscillator) during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Moreover, when switching to a clock signal produced with an external resonator (or by an external oscillator) while program execution is in progress, wait until the target clock signal is stable. • 5.
Differences between Products
Before changing from one product to another, i.e. to a product with a different part number, confirm that the change will not lead to problems. The characteristics of an MPU or MCU in the same group but having a different part number may differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system-evaluation test for the given product.
Notice 1.
Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information.
2.
Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.
3.
Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others.
4.
You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration, modification, copy or otherwise misappropriation of Renesas Electronics product.
5.
Renesas Electronics products are classified according to the following two quality grades: "Standard" and "High Quality". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots etc. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; and safety equipment etc. Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems, surgical implantations etc.), or may cause serious property damages (nuclear reactor control systems, military equipment etc.). You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application for which it is not intended. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics.
6.
You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges.
7.
Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or systems manufactured by you.
8.
Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.
9.
Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You should not use Renesas Electronics products or technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. When exporting the Renesas Electronics products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations.
10. It is the responsibility of the buyer or distributor of Renesas Electronics products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the contents and conditions set forth in this document, Renesas Electronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products. 11. This document may not be reproduced or duplicated in any form, in whole or in part, without prior written consent of Renesas Electronics. 12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1)
"Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries.
(Note 2)
"Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.
SALES OFFICES
http://www.renesas.com
Refer to "http://www.renesas.com/" for the latest and detailed information. Renesas Electronics America Inc. 2801 Scott Boulevard Santa Clara, CA 95050-2549, U.S.A. Tel: +1-408-588-6000, Fax: +1-408-588-6130 Renesas Electronics Canada Limited 1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada Tel: +1-905-898-5441, Fax: +1-905-898-3220 Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: +44-1628-585-100, Fax: +44-1628-585-900 Renesas Electronics Europe GmbH Arcadiastrasse 10, 40472 Düsseldorf, Germany Tel: +49-211-6503-0, Fax: +49-211-6503-1327 Renesas Electronics (China) Co., Ltd. Room 1709, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100191, P.R.China Tel: +86-10-8235-1155, Fax: +86-10-8235-7679 Renesas Electronics (Shanghai) Co., Ltd. Unit 301, Tower A, Central Towers, 555 Langao Road, Putuo District, Shanghai, P. R. China 200333 Tel: +86-21-2226-0888, Fax: +86-21-2226-0999 Renesas Electronics Hong Kong Limited Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong Tel: +852-2265-6688, Fax: +852 2886-9022/9044 Renesas Electronics Taiwan Co., Ltd. 13F, No. 363, Fu Shing North Road, Taipei 10543, Taiwan Tel: +886-2-8175-9600, Fax: +886 2-8175-9670 Renesas Electronics Singapore Pte. Ltd. 80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre, Singapore 339949 Tel: +65-6213-0200, Fax: +65-6213-0300 Renesas Electronics Malaysia Sdn.Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: +60-3-7955-9390, Fax: +60-3-7955-9510 Renesas Electronics Korea Co., Ltd. 12F., 234 Teheran-ro, Gangnam-Ku, Seoul, 135-920, Korea Tel: +82-2-558-3737, Fax: +82-2-558-5141
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