Transcript
4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS PLRXPL-Sx-VGx-xx-x
Key benefits • Compliant with Fibre Channel specifications • Compliant with SFP MSA specifications • Compliant to SFF-8472 Digital Diagnostics • High reliability • Enables higher port densities • Compatible with 1000BASE-LX (5km and 10km) applications Applications • Long reach Fibre Channel • High-speed storage area networks • Switch and hub interconnect • Mass storage systems interconnect • Host adapter interconnect • Computer cluster crossconnect
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The 4Gbps triple rate, Small Form Factor Pluggable (SFP) transceiver is a 1310nm VCSEL based product and is designed for single mode applications. With extended reach capability, the module satisfies a broad range of short-to-long distance Fibre Channel applications up to 10 km. The SFP transceiver features an uncooled 1310 nm high-speed VCSEL coupled to a LC optical connector. The multi-rate SFP complies with single mode Fibre Channel 100-SM-LC-L, 200-SM-LC-L, 400-SM-LC-L and 400-SM-LC-M specifications.
Highlights
1310nm VCSEL reduces thermal and EMI emissions from those present in DFB-based transceivers
4GFC, 2GFC, and 1GFC Triple rate performance enables flexible system design, and configuration, while maximizing bandwidth.
Enhanced Digital Diagnostic feature set allows real-time monitoring of transceiver performance and system stability
Rate-Selectable feature enables reciever bandwidth settings to optimize performance at different data rates
Bail mechanism enables superior ergonomics and functionality in all port configurations
Serial ID provides access to customer, vendor and system specific information, providing remote system control and monitoring
RoHS, Restriction of Hazardous Substances, compliance per European Directive 2002/95/EC ensures an environmentally safe product.
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4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS
PLRXPL-Sx-VGx-xx-x features • Utilizes a 1310 nm, high reliability, high speed vertical cavity laser. • Compliant with SFP MSA specifications • Compliant to RoHS; EU Directive 2003/95/EC • Compliance to Fibre Channel 100/ 200/400-SM-LC • Up to 10km on 9µm single mode fiber • Low power consumption (450mW Typ.) • Extended temperature and voltage range options • Single +3.3 V power supply • Bit error rate < 1x10-12 • OC transmit disable, loss of signal, and transmitter fault functions • Serial ID functionality • SFF-8472 Digital Diagnostics • CDRH and IEC 60825-1 Class 1 laser eye safe • FCC Class B compliant • ESD Class 2 per MIL-STD 883 Method 3015
The PLRXPL-Sx-VGx-xx-x long wavelength transceiver complies with small form factor pluggable (SFP) multisource agreement (MSA), and satisfies eye safety requirements of CDRH and IEC. The module design allows for excellent latching performance in high-density port configurations.
• UL-94 V-0 certified • Internal AC coupling on both transmit and receive data signals • All-metal housing for superior EMI performance
Ordering information Temp. Range:
Power Supply Tolerance:
Digital Diagnostics:
PLRXPL-SC-VG3-61-N
0 to 70οC
+5%
X
PLRXPL-SC-VG3-61
0 to 70οC
+5%
X
PLRXPL-SE-VG4-61-N
-20 to 85οC
+10%
X
PLRXPL-SE-VG4-61
-20 to 85οC
+10%
X
0 to 70οC
+5%
X
-20 to 85οC
+10%
X
Part Number:
PLRXPL-SC-VG3-41-N PLRXPL-SE-VG4-41
Rate Select
X
Reach
Contact Information:
10Km
Picolight Incorporated 1480 Arthur Avenue Louisville, CO 80027
10Km 10Km
X
10Km
Tel: 303.530.3189 E-mail:
[email protected] Web site: www.picolight.com
4Km1 X
4Km1
1. Reach is 10km at 1 and 2G.
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Section 1
Functional description
The PLRXPL-Sx-VGx-xx-x transceiver is designed to transmit and receive 8B/10B encoded serial optical data over 9/125 µm optical fiber.
Transmitter The transmitter converts 8B/10B encoded serial PECL/CML electrical data into serial optical data meeting the requirements of Fibre Channel 400/200/100-SM-LC specifications. Transmit data lines (TD+ & TD-) are internally AC coupled with 100 Ω differential termination. An open collector compatible Transmit Disable (TDis) is provided. This pin is internally terminated with a 10 kΩ resistor to VccT. A logic “1,” or no connection on this pin will disable the laser from transmitting. A logic “0” on this pin provides normal operation. The transmitter has an internal PIN monitor diode that is used to ensure constant optical power output across supply voltage and is used to temperature control the laser output power to ensure higher reliability at high temperature. An open collector compatible Transmit Fault (TFault) is provided. The Transmit Fault signal must be pulled high on the host board for proper operation. A logic “1” output from this pin indicates that a transmitter fault has occurred, or the part is not fully seated and the transmitter is disabled. A logic “0” on this pin indicates normal operation.
Receiver The receiver converts 8B/10B encoded serial optical data into serial PECL/CML electrical data. Receive data lines (RD+ & RD-) are internally AC coupled with 100 Ω differential source impedance, and must be terminated with a 100 Ω differential load. Rate select, pin 7, switches the receiver bandwith enabling superior performance at 4.25 Gbps, 2.125 Gbps, and 1.0625 Gbps line rates. With non rate-select parts or when rate-select is set “high” (4.25/ 2.125 Gbps mode) on rate-select part numbers, the receiver bandwidth is not compliant to the maximum receiver bandwidth specified under 100-SM-LC-L. Table 1
FC Compliance With Rate-select 100-SM-LC-L
200-SM-LC-L
400-SM-LC-M
400-SM-LC-L
High and -N part numbers
No1
Yes
Yes
Yes3
Low
Yes
Yes
No2
No2
1- Not compliant to RX bandwidth. 2- Not compliant to many receiver specifications 3- For PLRXPL-XX-XXX-61-X
An open collector compatible Loss of Signal is provided. The LOS must be pulled high on the host board for proper operation. A logic “0” indicates that light has been detected at the input to the receiver (see Section 3.4 Optical characteristic, LOS Assert/Deassert Time on page 9). A logic “1” output indicates that insufficient light has been detected for proper operation. Power supply filtering is recommended for both the transmitter and receiver. Filtering should be placed on the host assembly as close to the Vcc pins as possible for optimal performance.
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Recommended “Application Schematics” are shown in Figure 2 on page 5. Figure 1
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Block diagram
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4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS
Section 2
Application schematics
Recommended connections to the PLRXPL-Sx-VGx-xx-x transceiver are shown in Figure 2 below. Figure 2
Recommended application schematic for the PLRXPL-Sx-VGx-xx-x transceiver Vcc R1* 50Ω
Z* = 100Ω
10 kΩ 1 VeeT
PECL Driver (TX DATA) Receiver (Tx Fault)
VeeT 20 R2* 50Ω
Open Collector Driver (Tx Disable)
Vcc
10 kΩ
4 MOD_DEF(2)
VeeT 17
L1 1 µH
C3 0.1µF VccT 16
6 MOD_DEF(0)
VccR 15
Receiver (Mod_Def(0))
7 Rate Select
VccR 14
8 LOS
RD+ 13
C2 0.1µF
C1 10µF
C4 0.1 µF
10 kΩ
Vcc +3.3V Input
L2 1 µH
5 MOD_DEF(1)
Vcc
TD+ 18
Open Collector Bidirectional (Mod_Def(1))
10 kΩ
3 Tx Disable
Vcc
TD- 19
Open Collector Bidirectional (Mod_Def(2))
2 Tx Fault
C5 10 µF
R3* 50Ω Z* = 100Ω
PECL Receiver (RX DATA)
Rate Select 9 VeeR
RD- 12
10 VeeR
VeeR 11
Vcc
10 kΩ
R4* 50Ω
Receiver (LOS)
Notes
Power supply filtering components should be placed as close to the Vcc pins of the host connector as possible for optimal performance.
PECL driver and receiver will require biasing networks. Please consult application notes from suppliers of these components.
MOD_DEF(2) and MOD_DEF(1) should be bi-directional open collector connections in order to implement serial ID (MOD_DEF[0,1,1]) PLRXPL-Sx-VGx-xx-x transceiver.
*
Transmission lines should be 100 Ω differential traces. It is recommended that the termination resistor for the PECL Receiver (R3 + R4) be placed beyond the input pins of the PECL Receiver. Series Source Termination Resistors on the PECL Driver (R1+R2) should be placed as close to the driver output pins as possible.
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Section 3
Technical data
Technical data related to the 4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS includes: •
Section 3.1
Pin function definitions below
•
Section 3.2
Absolute maximum ratings on page 8
•
Section 3.3
Electrical characteristics on page 8
•
Section 3.4
Optical characteristic on page 9
•
Section 3.5
Link length on page 11
•
Section 3.6
Regulatory compliance on page 12
•
Section 3.8
Front panel opening on page 14
•
Section 3.9
Module outline on page 15
3.1 Pin function definitions Figure 3
Transceiver pin descriptions
1 2 3 4
Towards Bezel
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20 19
TD+
18
VeeT
17
VccT
16
VccR
15
VeeR
14
TXFault TX Disable MOD-DEF(2)
5
MOD-DEF(1)
6
MOD-DEF(0)
7
Rate Select
8
VeeT TD-
VeeT
RD+
13
RD-
12
VeeR
11
Towards ASIC
LOS
9
VeeR
10
VeeR
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Table 2 Pin Number
Transceiver pin descriptions Symbol
Name
Description Receiver
8
LOS
Loss of Signal Out (OC)
Sufficient optical signal for potential BER < 1x10-12 = Logic “0” Insufficient optical signal for potential BER < 1x10-12 = Logic “1” This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kΩ resistor.
9, 10, 11, 14
VeeR
Receiver Signal Ground
These pins should be connected to signal ground on the host board.
12
RD-
Receiver Negative DATA Out (PECL)
Light on = Logic “0” Output Receiver DATA output is internally AC coupled and series terminated with a 50 Ω resistor.
13
RD+
Receiver Positive DATA Out (PECL)
Light on = Logic “1” Output Receiver DATA output is internally AC coupled and series terminated with a 50 Ω resistor.
15
VccR
Receiver Power Supply
This pin should be connected to a filtered +3.3V power supply on the host board. See Application schematics on page 5 for filtering suggestions.
7
Rate
Rate Select (LVTTL)
This pin should be connected to the auto-negotiation rate select function for rate-select part numbers. Logic “1” and -N part numbers = 4.25Gbps/2.125Gbps Logic “0” = 2.125Gbps/1.25Gbps Transmitter
3
TX Disable
Transmitter Disable In (LVTTL)
Logic “1” Input (or no connection) = Laser off Logic “0” Input = Laser on This pin is internally pulled up to VccT with a 10 kΩ resistor.
1, 17, 20
VeeT
Transmitter Signal Ground
These pins should be connected to signal ground on the host board.
2
TX Fault
Transmitter Fault Out (OC)
Logic “1” Output = Laser Fault (Laser off before t_fault) Logic “0” Output = Normal Operation This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kΩ resistor.
16
VccT
Transmitter Power Supply
This pin should be connected to a filtered +3.3V power supply on the host board. See Application schematics on page 5 for filtering suggestions.
18
TD+
Transmitter Positive DATA In (PECL)
Logic “1” Input = Light on Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 Ω resistor.
19
TD-
Transmitter Negative DATA In (PECL)
Logic “0” Input = Light on Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 Ω resistor. Module Definition
6, 5, 4
MOD_DEF (0:2)
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Module Definition Identifiers
Serial ID with SFF 8472 Diagnostics (See Annex A) Module Definition pins should be pulled up to Host Vcc with 10 kΩ resistors.
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3.2 Absolute maximum ratings Parameter
Symbol
Ratings
Unit
Storage Temperature
Tst
-40 to +100
°C
Operating CaseTemperature
Ta
-20 to 85
°C
Notes
PLRXPL-SE-VGx-xx-x
0 to 70
PLRXPL-SC-VGx-xx-x
Power Supply Voltage
Vcc
0 to +3.63
V
Transmitter Differential Input Voltage
VD
2.5
VP-P
Relative Humidity
RH
5 to 95
%
3.3 Electrical characteristics Parameter Supply Voltage
Symbol
Min
Typical
Max
Unit
Vcc
2.97
3.3
3.63
V
3.13
3.3
3.47
Data Rate
1.0
Notes1 PLRXPL-Sx-VG4-xx-x PLRXPL-Sx-VG3-xx-x
4.3
Gbps
BER < 1x10-12
44
70
mA
800
2200
mVp-p
90
ps
20% - 80%, Differential 4 Gd operation
175
ps
2 GBd operation
Transmitter Supply Current Data Input Voltage Swing
ICCT VTDp-p
Data Input Rise/Fall Time
250 60
350 Data Input Skew Data Input Deterministic Jitter
Data Input Total Jitter
Transmit Disable Voltage Level
Transmit Disable/Enable Assert Time
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Differential, peak to peak, 3
1 Gbd opeation
20
ps
DJ
0.12
UI
±K28.5 pattern, δT, @ 1.062 Gbps, 1
DJ
0.14
UI
±K28.5 pattern, δT, @ 2.125Gbps, 1
DJ
0.14
UI
±K28.5 pattern, δT @ 4.25Gbps, 1
TJ
0.25
UI
27-1 pattern, δT1, BER < 1x10-12, @ 1.062 Gpbs, 1
TJ
0.26
UI
27-1 pattern, δT, BER < 1x10-12, @ 2.125 Gpbs, 1
TJ
0.26
UI
27-1 pattern, δT, BER < 1x10-12, @ 4.25Gbps, 1 Laser output disabled after TTD if input level is VIH; Laser output enabled after TTEN if input level is VIL
VIH
Vcc -1.0
Vcc
V
VIL
0
0.8
V
TTD
10
µs
TTEN
1
ms
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3.3 Electrical characteristics Parameter
(continued)
Symbol
Min
Transmit Fault Output Voltage Level
VOH VOL
Transmit Fault Assert and Reset Times
TFault
Initialization Time
Typical
Max
Unit
Vcc -0.5
Vcc
V
0
0.5
V
100
µs
Notes1 Transmit fault level is VOH and Laser output disabled TFault after laser fault.
µs
Transmitter fault is VOL and Laser output restored TINI after transmitter disable is asserted for TReset, then disabled.
300
ms
After Hot Plug or Vcc ≥ 2.97V
90
120
mA
720
1300
mVp-p
80
120
ps
20% - 80%, Differential
40
ps
RLOAD = 100 Ω, Differential
DJ
0.36
UI
±K28.5 pattern, δR, @ 1.062 Gbps, 1
DJ
0.39
UI
±K28.5 pattern, δR, @ 2.125 Gbps, 1
DJ
0.39
UI
±K28.5 pattern, δR, @ 4.25 Gbps, 1
TJ
0.61
UI
27-1 pattern, BER < 1x10-12, δR, @ 1.062 Gbps, 1
TJ
0.64
UI
27-1 pattern, BER < 1x10-12, δR, @ 2.125Gbps, 1
TJ
0.64
TReset
10
TINI Receiver
Supply Current
ICCR
Data Output Voltage Swing
600
Data Output Rise/Fall Time Data Output Skew Data Output Deterministic Jitter
Total Jitter
LOS Voltage Level
LOS Assert/Deassert Time
RLOAD = 100 Ω, Differential
27-1 pattern, BER < 1x10-12, δR, @ 4.25 Gbps, 1
VOH
Vcc -1.0
Vcc
V
LOS output level VOL TLOSD
VOL
0
0.5
V
after light input > LOSD, 2
TLOS
100
µs
LOS output level VOH TLOSA
TSD
100
µs
after light input < LOSA, 2
Max
Unit
Notes1
1360
nm
1. See Specification notes on page 11 for referenced notes.
3.4 Optical characteristic Parameter
Symbol
Min.
Typical Transmitter
Wavelength
λp
RMS spectral width
∆λ
0.1
nm
For P/N: PLRXPL-Sx-VGx-61-x
Maximum -20dB Width
∆λ
0.4
nm
For P/N: PLRXPL-Sx-VGx-61-x
1265
1280
1. See Specification notes on page 11 for referenced notes.
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3.4 Optical characteristic Parameter RMS spectral width
(continued)
Symbol
Typical
∆λ
Side Mode Suppression ratio Average Optical Power
Min.
Max
Unit
Notes1
1
nm
For P/N: PLRXPL-Sx-VGx-41-x
30 PAVG
dB
-8.4
-3.0
-10.6
-3.0
RIN12OMA Optical Output Rise/Fall Time
trise/fall
Optical Modulation Amplitude
OMA
dBm
For P/N: PLRXPL-Sx-VGx-41-x
-120
dB/Hz
90
ps µW
290
For P/N: PLRXPL-Sx-VGx-61-x
174
20% - 80% Equivalent to 9 dB ER at PAVG = -7.29dBm For P/N: PLRXPL-Sx-VGx-61-x Equivalent to 9 dB ER at PAVG = -9.5dBm For P/N: PLRXPL-Sx-VGx-41-x
Extinction Ratio
ER
Deterministic Jitter
DJ
0.21
UI
±K28.5 pattern, γT, @ 1.062 Gbps, 1
DJ
0.26
UI
±K28.5 pattern, γT, @ 2.125 Gbps, 1
DJ
0.26
UI
±K28.5 pattern, γT, @ 4.25 Gbps, 1
TJ
0.43
UI
TJ
0.44
UI
27-1 pattern, γT, @ 2.125 Gbps,
TJ
0.44
UI
27-1 pattern, γT, @ 4.25 Gbps, 1
1365
nm
Total Jitter
3
dB
27-1 pattern, γT, @ 1.062 Gbps,
1
1
Receiver Wavelength
λ
1265
Average Optical Received Power
Popt
-1
dBm
Average @ nominal wavelength
Optical Modulation Amplitude
OMA
15
µW
BER < 1x10-12 1.062 Gbps
15
µW
BER < 1x10-12 2.125 Gbps
29
µW
BER < 1x10-12 4.25 Gbps
-20
dBm
Chatter Free Operation
Loss of Signal Assert/Deassert Level Low Frequency Cutoff Optical Return Loss
LOSD LOSA
-23 -31
dBm
FC
100 12
kHz
-3 dB
dB
1. See Specification notes on page 11 for referenced notes.
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3.5 Link length Data Rate / Standard
Fiber Type
Distance Range (m)
Notes1
1.0625 GBd Fibre Channel 100-SM-LC-L
9/125µm SMF
2 to 10,000
3
2.125 GBd Fibre Channel 200-SM-LC-L
9/125µm SMF
2 to 10,000
3
4.25 GBd Fibre Channel 400-SM-LC-L
9/125µm SMF
2 to 10,000
3
4.25 GBd Fibre Channel 400-SM-LC-M
9/125µm SMF
2 to 4,000
3
1. See Specification notes on page 11 for referenced notes.
Specification notes 1. UI (Unit Interval): one UI is equal to one bit time. For example, 1.25 Gbps corresponds to a UI of 800ps. 2. For LOSA and LOSD definitions see Loss of Signal Assert/Deassert Level in Section 3.4 Optical characteristic on page 9. 3. “Link Length” distances are calculated for worst case fiber and transceiver characteristics. The link is total loss dominated and 40km at 1.062Gbps and 2.125Gbps and 30km at 4Gbps is achievable for 10km products, provided the loss in the link is < 10dB for 4Gbps applications and < 12.8dB for 1Gbps and 2Gbps applications
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3.6 Regulatory compliance The PLRXPL-Sx-VGx-xx-x complies with common ESD, EMI, Immunity, and Component recognition requirements and specification (see details in Table 3 on Page 12). ESD, EMI, and Immunity are dependent on the overall system design. Information included herein is intended as a figure of merit for designers to use as a basis for design decisions. Table 3
Regulatory Compliance
Feature
Test Method
Performance
Laser Eye Safety
U.S. 21CFR (J) 1040.10 & 1040.11 IEC 60825-2 1997
CDRH compliant and Class 1 laser safe. Accession # 0532370
Electrostatic Discharge (ESD) to electrical pins
MIL-STD 883C; Method 3015.4
Class 1 (> 1 kV)
Electrostatic Discharge (ESD) to optical connector
IEC 61000-4-2: 1999
Withstand discharges of 15 kV using a “Human Body Model” probe
Electromagnetic Interference (EMI)
FCC Part 15 Subpart J Class B CISPR 22: 1997 EN 55022: 1998 Class B VCCI Class I
Noise frequency range: 30 MHz to 10 GHz. Good system EMI design practice required to achieve Class B margins.
Immunity
IEC 61000-4-3: 1998
Field strength of 3 V/m RMS, from 10 MHz to 1 GHz. No effect on transceiver performance is detectable between these limits.
Component
UL 1950 IEC 60950: 1999
UL File # E209897 TUV Certificate # U8V060138649042
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3.7 PCB layout Figure 4
Board layout NOTES:
34.50
1. DATUM AND BASIC DIMENSIONS ESTABLISHED BY CUSTOMER.
2X 30 A
2. PADS AND VIAS ARE CHASSIS GROUND 11 PLACES
20 3X 10
1
CROSS-HATCHED AREA DENOTES COMPONENT AND TRACE KEEPOUT (EXCEPT CHASSIS GROUND)
3. THRU HOLES, PLATING OPTIONAL
2X 7.20
B
3X 7.10 0.85±0.05 2 (MARKED "S") 0.1 A B
2X 2.50 2X 2.50
11.9 1
4. HOLES DENOTED WITH 'A' ARE NOT REQUIRED WITH PICOLIGHT CAGES (6 PLACES) 5. ALL DIMENSIONS ARE IN MILLIMETERS
C D
3.68 1.70 A
11.08
14.25 16.25 TYP
8.58
8.48
A
5.68 11.93
A
B
9.60
A
4.80
A A
1.70 2 TYP
2
2 10X 0.1
1.05±0.05 L A C
5
26.80
10 3 PLACES
9X 0.95±0.05 3 (MARKED "G") 0.1 L A C THIS AREA DENOTES COMPONENT KEEP-OUT (TRACES ALLOWED)
41.30 42.30
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4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS
Figure 5
Detail layout 10X 5
10X 3.20 G
2X 0.90 G
S
G
G
10.93
10.53 11.93 9.60
9X 0.8
G
9X 0.8
G
G
G
G
2X 1.55±0.05 0.1 L C D
20X 0.50±0.03 0.06 C D
2±0.05 TYP 0.06 L C D
ALL DIMENSIONS ARE IN MILLIMETERS
3.8 Front panel opening Figure 6
All dimensions are in millimeters
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3.9 Module outline Figure 7
All dimensions are in millimeters
Section 4
Related information
Other information related to the 4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS includes: •
Section 4.1 Digital Diagnostic Monitoring and Serial ID Operation
•
Section 4.2 Package and handling instructions
•
Section 4.3 ESD discharge (ESD)
•
Section 4.4 Eye safety
4.1 Digital Diagnostic Monitoring and Serial ID Operation The PLRXPL-Sx-VGx-xx-x is equipped with a 2-wire serial EEPROM that is used to store specific information about the type/identification of the transceiver as well as real-time digitized information relating to the transceiver’s performance. See Section IV, “Module Definition Interface and Data Field Description” of the SFP-MSA Pin Definitions and Host Board Layout document for memory/address organization of the identification data and the Small Form Factor Commitee’s document number SFF8472 Rev 9.5, dated June 1, 2004, for memory/address organization of the digital diagnostic data. To communicate to the module it is required that the host clock either be running at 100kHz or less (per the SFP MSA) or implementing Clock Stretching per the 2-wire serial interface protocol.
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4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS
The enhanced digital diagnostics feature monitors five key transceiver parameters which are Internally Calibrated and should be read as absolute values and interpreted as follows; Transceiver Temperature in degrees Celsius: Internally measured. Represented as a 16 bit signed two’s complement value in increments of 1/256 degrees Celsius from -40 to +125°C with LSB equal to 1/256 degrees C. Accuracy is ± 3 degrees Celsius over the specified operating temperature and voltage range. Vcc/Supply Voltage in Volts: Internally measured. Represented as a 16 bit unsigned integer with the voltage defined as the full 16 bit value(0-65535) with LSB equal to 100µV with a measurement range of 0 to +6.55V. Accuracy is ± 3% of nominal value over the specified operating temperature and voltage ranges. TX Bias Current in µΑ: Represented as a 16 bit unsigned integer with current defined as the full 16 bit value(0-65535) with LSB equal to 2µΑ with a measurement range of 0 - 131mA. Accuracy is ± 10% of nominal value over the specified operating temperature and voltage ranges. TX Output Power in mW: Represented as a 16 bit unsigned integer with the power defined as the full 16 bit value (0-65535) with LSB equal to 0.1µW. Accuracy is ± 2dB over the specified temperature and voltage ranges over the permitted range of 87µW to 500µW( -10.6dBm to -3dBm). Data is not valid when transmitter is disabled. RX Received Optical Power in mW: Represented as average power as a 16 bit unsigned integer with the power defined as the full 16 bit value(0-65535) with LSB equal to 0.1µW. Accuracy is ± 3dB over the specified temperature and voltage ranges over the power range of 10µW to 800µW (-20dBm to 1dBm).
Reading the data The information is accessed through the MOD_DEF(1), and MOD_DEF(2) connector pins of the module. The specification for this EEPROM (ATMEL AT24CO1A family) contains all the timing and addressing information required for accessing the data. The device address used to read the Serial ID data is 1010000X(A0h), and the address to read the diagnostic data is 1010001X(A2h). Any other device addresses will be ignored. Refer to Figure 4, Figure 5, and Figure 6 for information regarding addresses and data field descriptions MOD_DEF(0), pin 6 on the transceiver, is connected to Logic 0 (Ground) on the transceiver. MOD_DEF(1), pin 5 on the transceiver, is connected to the SCL pin of the EEPROM. MOD_DEF(2), pin 4 on the transceiver, is connected to the SDA pin of the EEPROM. Write access is only allowed to the customer-writable field(bytes 128-247 of address 1010001X).
Decoding the data The information stored in the EEPROM including organization is defined in the Small Form-Factor Pluggable Multisource (SFP-MSA) Pin Definitions and Host Board Layout document, dated 3/13/00, Section IV. The digital diagnostic information stored in the EEPROM is defined in the Small FormFactor document SFF-8472 draft rev 9.5, dated 6/1/04.
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Table 4
Data Field Descriptions
0
Address( 1010000X)(A0h) Serial ID Information; Defined by SFP MSA
95 Picolight Specific Information
127
0
Reserved for External Calibration Constants 95 Real Time Diagnostic Information 119 Picolight Specific Information
127
Non-volatile, customerwriteable, field-writeable area
247
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Alarm and Warning Limits
55
Reserved for SFP MSA
255
Address( 1010001X)(A2h)
255
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Picolight Specific Information
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4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS
Table 5
Serial ID Data and Map
Address (1010000X)(A0h) Memory Value Address 0 03 1 04 2 07 3-10 0000000012000115 11 01 12 2B 13 00 0A 14 04 64 15 28 16 00 17 00 18 00 19 00 20-35 PICOLIGHT 36 00 37-39 000485 40-55 56-59 60-61 051E 62 63 64 00 1A 65
Comments SFF Transceiver SFP with Serial ID LC Connector 1310nm singlemode, 100/200/400 FCI 8B10B encoding mechanism Nominal Bit rate of 4.3Gbps Reserved km of 9 micron fiber supported; 10km product line km of 9 micron fiber supported; 4km product line 100m of 9 micron fiber supported; 100 x 100m; 10km product line 100m of 9 micron fiber supported; 40 x 100m; 4km product line Multimode fiber not supported Multimode fiber not supported Copper not supported Reserved Vendor Name (ASCII) Reserved IEEE Company ID (ASCII) Part Number (ASCII) Rev of part number (ASCII) WaveLength of laser in nm; 1310 Reserved Check Code; Lower 8 bits of sum from byte 0 through 62 Reserved No Rate Select; Tx_Disable, Tx Fault, Loss of Signal implemented; -xx-N part numbers
3A Rate Select, Tx_Disable, Tx Fault, Loss of Signal implemented; -xx part numbers
66 67 68-83 84-91 92
00 00
93
F0
68
F8 94 95 96-127 128-255
March 2006
02
Serial Number (ASCII) Date Code (ASCII) Digital Diagnostic Monitoring implemented, Internally calibrated, Receiver Power type is average Alarms & Warnings, TX_Fault and Rx_LOS monitoring implemented, TX_Disable Control & Monitoring; No Soft Rate Select, -xx-N part numbers Alarms & Warnings, TX_Fault and Rx_LOS monitoring implemented, TX_Disable Control & Monitoring, Soft Rate Select, -xx part numbers SFF-8472 Rev 9.4 compliant Check Code; Lower 8 bits of sum from byte 64 through 94 Picolight specific EEPROM Reserved
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4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS
Table 6
Diagnostic Data Map
Address (1010001X)(A2h) Memory Address
Value
Comments
00-01
Temp High Alarm
MSB at low address
02-03
Temp Low Alarm
MSB at low address
04-05
Temp High Warning
MSB at low address
06-07
Temp Low Warning
MSB at low address
08-09
Voltage High Alarm
MSB at low address
10-11
Voltage Low Alarm
MSB at low address
12-13
Voltage High Warning
MSB at low address
14-15
Voltage Low Warning
MSB at low address
16-17
Bias High Alarm
MSB at low address
18-19
Bias Low Alarm
MSB at low address
20-21
Bias High Warning
MSB at low address
22-23
Bias Low Warning
MSB at low address
24-25
TX Power High Alarm
MSB at low address
26-27
TX Power Low Alarm
MSB at low address
28-29
TX Power High Warning
MSB at low address
30-31
Tx Power Low Warning
MSB at low address
32-33
RX Power High Alarm
MSB at low address
34-35
RX Power Low Alarm
MSB at low address
36-37
RX Power High Warning
MSB at low address
38-39
RX Power Low Warning
MSB at low address
40-55
Reserved
56-59
External Calibration Contant
Rx_PWR(4) = 0 for Internally Calibrated
60-63
External Calibration Contant
Rx_PWR(3) = 0 for Internally Calibrated
64-67
External Calibration Contant
Rx_PWR(2) = 0 for Internally Calibrated
68-71
External Calibration Contant
Rx_PWR(1) = 1 for Internally Calibrated
72-75
External Calibration Contant
Rx_PWR(0) = 0 for Internally Calibrated
76-77
External Calibration Contant
Tx_I(Slope) = 1 for Internally Calibrated
78-79
External Calibration Contant
Tx_I(Offset) = 0 for Internally Calibrated
80-81
External Calibration Contant
Tx_PWR(Slope) = 1 for Internally Calibrated
82-83
External Calibration Contant
Tx_PWR(Offset) = 0 for Internally Calibrated
84-85
External Calibration Contant
T(Slope) = 1 for Internally Calibrated
86-87
External Calibration Contant
T(Offset) = 0 for Internally Calibrated
88-89
External Calibration Contant
V(Slope) = 1 for Internally Calibrated
90-91
External Calibration Contant
V(Offset) = 0 for Internally Calibrated
92-94
Reserved
Reserved
95
Check_sum
Bytes 0_94
96
Temperature MSB
Internal temperature
97
Temperature LSB
98
Vcc MSB
99
Vcc LSB
100
TX Bias MSB
101
TX Bias LSB
102
TX Power MSB
103
TX Power LSB
104
RX Power MSB
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Internally measured supply voltage Internally measure TX Bias Current Measured TX output power Measured RX input power
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4G, Multi-rate, Fibre Channel, 1310nm VCSEL based SFP transceiver, RoHS
Diagnostic Data Map Continued
Memory Address Value 105 RX Power LSB 106 Reserved MSB 107 Reserved LSB 108 Reserved MSB 109 Reserved LSB 110-7 Tx Disable State 110-6 110-5
110-4 110-3
110-2
110-1
110-0 111
112-119
120-127
128-247
248-255
Comments For 1 st future definition of digitized analog input For 2 nd future definition of digitized analog input Digital state of Tx Disable Pin Writing Ô1 ” disables laser. This is OR’d with Tx_ Disable pin
Soft Tx Disable Control Reserved Rate Select State
Digital State of Rate Select Pin Writing "1" selects high bandwidth. This is OR'd with Soft Rate Select Control Rate Select Pin. Tx Fault State Digital State LOS State Digital State Data Ready State Digital State; Ô1” until transceiver is ready Reserved Reserved Optional alarm & warning flag bitsRefer to SFF-8472 rev 9.5 Vendor specific Vendor specific User/ Customer EEPROM Field writeable EEPROM Vendor specific Vendor specific
4.2 Package and handling instructions Process plug The PLRXPL-Sx-VGx-xx-x is supplied with a dust cover. This plug protects the transceiver’s optics during standard manufacturing processes by preventing contamination from air borne particles. Note:
It is recommended that the dust cover remain in the transceiver whenever an optical fiber connector is not inserted.
Recommended cleaning and de-greasing chemicals Picolight recommends the use of methyl, isopropyl and isobutyl alcohols for cleaning. Do not use halogenated hydrocarbons (e.g. trichloroethane, ketones such as acetone, chloroform, ethyl acetate, MEK, methylene chloride, methylene dichloride, phenol, N-methylpyrolldone).
Flammability The PLRXPL-Sx-VGx-xx-x housing is made of cast zinc.
4.3 ESD discharge (ESD) Handling Normal ESD precautions are required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from packaging and handled only in an ESD protected environment utilizing standard grounded benches, floor mats, and wrist straps. March 2006
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Test and operation In most applications, the optical connector will protrude through the system chassis and be subjected to the same ESD environment as the system. Once properly installed in the system, this transceiver should meet and exceed common ESD testing practices and fulfill system ESD requirements. Typical of optical transceivers, this module’s receiver contains a highly sensitive optical detector and amplifier which may become temporarily saturated during an ESD strike. This could result in a short burst of bit errors. Such an event might require that the application re-acquire synchronization at the higher layers (e.g. Serializer/Deserializer chip).
4.4 Eye safety The PLRXPL-Sx-VGx-xx-x is an international Class 1 laser product per IEC 825-2: 1997, and per CDRH, 21 CFR 1040 Laser Safety Requirements. The PLRXPL-Sx-VGx-xx-x is an eye safe device when operated within the limits of this specification. Operating this product in a manner inconsistent with intended usage and specification may result in hazardous radiation exposure.
CAUTION! Tampering with this laser based product or operating this product outside the limits of this specification may be considered an act of “manufacturing,” and will require, under law, recertification of the modified product with the U.S. Food and Drug Administration (21 CFR 1040).
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March 2006