Transcript
TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Applications
Repeaters Mobile Infrastructure LTE / WCDMA / CDMA / GSM General Purpose Wireless TDD or FDD systems
2x2 mm 8 Pin DFN Package
Product Features
Functional Block Diagram Pin 1 Reference Mark
50−6000 MHz Operating Range 0.65 dB Noise Figure @ 1900 MHz 16.5 dB Gain @ 1900 MHz +37 dBm Output IP3 +22.5 dBm P1dB Shut-down capability Unconditionally stable 50 Ohm Cascadable Gain Block +5V Single Supply, 115 mA Current 2x2 mm 8 Pin DFN plastic package
NC
1
8
NC
RF In
2
7
RF Out
NC
3
6
Shut Down
NC
4
5
NC
Backside Paddle - RF/DC GND
General Description
Pin Configuration
The TQP3M9035 is a high-linearity, low noise gain block amplifier in a low-cost surface-mount package. At 1900 MHz, the amplifier typically provides 16.5 dB gain, +37 dBm OIP3, and 0.65 dB Noise Figure. The LNA is also designed to be broadband without the requirement for external matching. The device is housed in a leadfree/green/RoHS-compliant industry-standard 2x2 mm package.
Pin #
Label
1, 3, 4, 5, 8 2 6 7 Backside Paddle
No Connect or GND RF In Shut Down RF Out RF/DC GND
The TQP3M9035 has the benefit of having high linearity while also providing very low noise across a broad range of frequencies. This allows the device to be used in both receive and transmit chains for high performance systems. The amplifier is internally matched using a high performance E-pHEMT process and only requires an external RF choke and blocking/bypass capacitors for operation from a single +5V supply. The low noise amplifier integrates a shut-down biasing capability to allow for operation for TDD applications. The TQP3M9035 covers the 50−6000 MHz frequency band and is targeted for wireless infrastructure or other applications requiring high linearity and/or low noise figure.
Ordering Information Part No.
Description
TQP3M9035 TQP3M9035-PCB
High Linearity LNA Gain Block 500−6000 MHz Eval. Board
Standard T/R size = 2500 pieces on a 7” reel. Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
- 1 of 11 -
Disclaimer: Subject to change without notice
www.triquint.com / www.qorvo.com
TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Absolute Maximum Ratings
Recommended Operating Conditions
Parameter
Rating
Parameter
Min Typ Max Units
Storage Temperature Supply Voltage (VDD) RF Input Power, CW, 50Ω,T = 25°C
−65 to 150°C +6 V +23 dBm
Supply Voltage (VDD) TCASE TJ (for >106 hours MTTF)
+4.75 −40
Operation of this device outside the parameter ranges given above may cause permanent damage.
+5
+5.25 +85 190
V °C °C
Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions.
Electrical Specifications Test conditions unless otherwise noted: +25°C, VDD =+5V, 50 Ω system.
Parameter Operational Frequency Range Test Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Noise Figure Switching Speed Power Shutdown Control (At J5 on Evaluation Board) Current, IDD Shutdown pin current, ISD Thermal Resistance, θjc
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
Conditions
Min
Typ
50 15
Pout=+4 dBm/tone, Δf=1 MHz Rise Time (10%-90%) Fall Tine (90%-10%) On state Off state (Power down) On state Off state (Power down) VPD ≥ 3 V channel to case
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+20 +32.5
1900 16.5 13 10 +23 +37 0.65 165 255
0 3 115 3 100
Max
Units
6000
MHz MHz dB dB dB dBm dBm dB ns ns V V mA mA µA °C/W
18
1.0
0.8 VDD 150
50
Disclaimer: Subject to change without notice
www.triquint.com / www.qorvo.com
TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
S-Parameters Test conditions unless otherwise noted: VDD=+5 V, IDD=115 mA (typ.), Temp=+25°C, 50 Ohm system Freq (GHz)
S11 (dB)
S11 (ang)
S21 (dB)
S21 (ang)
S12 (dB)
S12 (ang)
S22 (dB)
S22 (ang)
50 100 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 3200 3400 3600 3800 4000 4200 4400 4600 4800 5000 5200 5400 5600 5800 6000
-11.5 -13.8 -14.8 -15.0 -15.0 -14.9 -15.0 -15.0 -15.1 -15.2 -15.4 -15.6 -15.8 -15.9 -16.1 -16.1 -16.5 -16.4 -16.0 -15.4 -14.8 -14.2
-43.9 -43.3 -50.7 -74.6 -93.2 -106.9 -117.2 -125.4 -131.8 -137.5 -142.3 -147.1 -151.7 -156.6 -161.5 -166.5 -174.6 179.5 176.3 173.5 170.9 169.0
28.8 28.2 27.6 26.1 24.5 23.0 21.6 20.4 19.4 18.5 17.6 16.9 16.2 15.6 15.0 14.5 14.0 13.6 13.2 12.8 12.5 12.2
165.0 161.3 151.4 132.1 116.9 104.8 94.8 86.1 78.2 71.0 64.2 57.7 51.4 45.4 39.5 33.6 27.9 22.3 16.8 11.2 5.6 -0.1
-31.8 -31.5 -31.4 -31.4 -31.3 -30.9 -30.3 -29.7 -29.0 -28.3 -27.6 -27.0 -26.4 -25.9 -25.4 -25.0 -24.6 -24.2 -23.8 -23.5 -23.2 -22.9
13.5 8.5 6.5 9.2 13.3 17.6 21.5 23.5 25.1 25.8 25.5 25.1 24.4 22.8 21.2 19.3 17.4 15.1 12.8 10.3 7.9 4.7
-22.0 -26.5 -20.1 -14.9 -13.1 -12.2 -11.8 -11.6 -11.4 -11.2 -11.0 -10.7 -10.4 -10.1 -9.7 -9.3 -8.7 -8.3 -8.0 -7.8 -7.6 -7.4
-106.8 172.1 99.9 57.7 35.6 19.5 6.5 -5.1 -16.0 -26.4 -36.2 -45.5 -54.5 -62.8 -70.6 -77.8 -82.9 -88.4 -94.5 -100.7 -106.8 -113.2
-14.4 -14.2 -14.2 -13.9 -13.5 -13.0 -12.2 -11.4 -10.5 -9.4
-174.7 -178.1 178.5 176.9 177.2 177.4 176.6 178.1 177.9 177.1
11.7 11.4 11.0 10.6 10.2 9.8 9.3 8.8 8.2 7.7
-7.3 -14.2 -21.3 -28.2 -35.3 -42.2 -49.2 -55.7 -62.3 -68.7
-22.7 -22.6 -22.5 -22.4 -22.4 -22.5 -22.6 -23.0 -23.3 -23.7
-2.9 -6.7 -11.6 -16.2 -21.0 -25.2 -30.3 -34.5 -38.2 -41.3
-8.3 -8.0 -7.6 -7.1 -6.5 -5.9 -5.3 -4.7 -4.2 -3.8
-124.1 -134.6 -145.4 -155.6 -164.7 -173.2 179.4 173.3 168.1 163.9
Noise Parameters Test conditions unless otherwise noted: VDD=+5 V, IDD=115 mA (typ.), Temp=+25°C, 50 Ohm system Freq (MHz)
NFmin (dB)
MagOpt (mag)
AngOpt (deg)
Rn (Ω)
700 1100 1500 1900 2300 2700
0.41 0.50 0.59 0.49 0.59 0.74
0.100 0.127 0.113 0.229 0.267 0.300
118 140 165 166 179 -166
0.046 0.048 0.060 0.045 0.048 0.051
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
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Disclaimer: Subject to change without notice
www.triquint.com / www.qorvo.com
TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
TQP3M9035-PCB Evaluation Board Bill of Material − TQP3M9035-PCB Reference Des.
Value
L1
R
3
N/A N/A J3 J5 J4 U1 n/a R1 10K Ω R2 33K Ω C4 C3 R3 0Ω (1) U1 L1 68 nH C4 R2 1.0 uF C1, C2, C3, C5, C6(1) 100 pF J3, J4, J5 n/a C2
R1
C1
Description
Manuf.
Part Number
Printed Circuit Board Qorvo J3 V High Linearity LNA Gain Block DD Qorvo Resistor, Chip, 0402, 5%, 1/16W various J4 GND Resistor, Chip, 0402, 5%, 1/16W various Resistor, Chip, 0402, 5%, 1/16W various Inductor, 0603, 5%, Ceramic various L1 Cap., Chip, 0402, 10%, 10V, X5R various C1 J1 50V, NPO/COG Cap., Chip, 0402, 5%, various 2 7 Q1 6 Solder Turret various RF Input
C4 1084112 TQP3M9035 various C3 various various various various C2 J2 various various RF Output
Notes: 1,3,4,5,8 1. For 50-500 MHz operation set L1=82 nH and C1, C2, C5, C6=1000 pF.
R2 J5 PD
C5
R1
C6
See note 6. Resistors are not needed if shut-down functionality is not used.
Notes: 1. See Evaluation Board PCB Information section for material and stack-up. 2. R3 (0 Ω jumper) is not shown on the schematic and may be replaced with copper trace in the target application layout. 3. All components are of 0402 size unless stated on the schematic. 4. C1, C2, and C3 are non-critical values. The reactive impedance should be as low as possible at the frequency of operation for optimal performance. 5. The L1 value is non-critical and needs to provide high reactive impedance at the frequency of operation. 6. R1 and R2 are optional and do not need to be loaded if the shut-down functionality is not needed; i.e. FDD applications. If R1 and R2 are not loaded, the LNA will operate in its standard “ON” state. 7. A through line is included on the evaluation board to de-embed the board losses.
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
- 4 of 11 -
Disclaimer: Subject to change without notice
www.triquint.com / www.qorvo.com
TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Typical Performance TQP3M9035-PCB VDD = +5 V Test conditions unless otherwise noted: I DD=115 mA (typ.), Temp=+25°C
Parameter Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Noise figure (1)
Conditions
Units
Typical Value
Pout= +4 dBm/tone, Δf=1 MHz
900 22.0 14 13 +23 +37.2 0.55
1900 16.5 14 10 +23 +37.0 0.65
2600 14.0 14 8 +23 +37.3 1.0
3500 12.0 14 7
1.4
MHz dB dB dB dBm dBm dB
Notes: 1. Noise figure data shown in the table above is de-embedded from the eval board loss.
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
- 5 of 11 -
Disclaimer: Subject to change without notice
www.triquint.com / www.qorvo.com
TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Performance Plots - TQP3M9035-PCB VDD = +5 V Test conditions unless otherwise noted: IDD=115 mA (typ.), Temp=+25°C Gain vs. Frequency
30
Input Return Loss vs. Frequency
0
Output Return Loss vs. Frequency
0
-5
+25°C −40°C
15
-5 +85°C
|S22| (dB)
+85°C
20
|S11| (dB)
|S21| (dB)
25
+25°C
-10
−40°C
+85°C
-10
+25°C −40°C
10
-15
-15
5 0
-20
0
1000
2000
3000
4000
5000
-20
6000
0
1000
2000
Frequency (MHz)
P1dB vs. Frequency
27
3000
4000
5000
6000
0
2000
OIP3 vs. Pout/tone
40
3000
4000
38
+85°C
45
+25°C
21
19
36 2600 MHz
1900 MHz
34
900 MHz
40
35
30
32
17
25
30
500
1500
2500
3500
4500
0
1
2
Frequency (MHz)
3
4
5
6
7
0
8
500
1000
ACLR vs. Output Power
-45
WCDMA 3GPP Test Model 1+64 DPCH PAR=10.2 dB at 0.01% Probability 3.84 MHz BW
42
3500 MHz
2.1
-55
5000 MHz
1.8
1.5
+85°C
+25°C
1.2 0.9
900 1900 2140 2600
-60
4500 MHz
3000
2.4
4000 MHz
33
2500
2.7
NF (dB)
ACLR (dBc)
36
2000
Noise Figure vs. Frequency
3.0
Temp.=+25°C
-50
39
1500
Frequency (MHz)
Pout/Tone (dBm)
OIP3 vs Pout
45
OIP3 (dBm)
−40°C
OIP3 (dBm)
OIP3 (dBm)
P1dB (dBm)
−40°C
23
6000
OIP3 vs. Frequency
50
Pout=+4 dBm per tone 1 MHz tone spacing
+25°C
5000
Frequency (MHz)
+85°C
25
1000
Frequency (MHz)
0.6 0.3
5500 MHz
−40°C
6000 MHz
30
-4
-2
0
2
4
0.0
-65 8
9
Pout (dBm)
10
11
12
13
0
14
1000
2000
Idd vs. Shutdown Voltage
140
3000
4000
5000
6000
Frequency (MHz)
Output Power (dBm)
Gain vs. Frequency (Shut-Down Mode)
0
VDD = +5 V VPD = +3.3 V
120 100
-10
Gain (dB)
Idd (mA)
+85°C
80
+25°C −40°C
60
40
-20
-30
20 0
-40
-20 0
1
2
3
4
5
0
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
1000
2000
3000
4000
Frequency (MHz)
Shutdown Voltage (V)
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TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Typical Performance − TQP3M9035-PCB VDD = +3.3 V Testconditions conditionsunless unlessotherwise otherwisenoted: noted:VI DD mA Test =+3.3 V,(typ.), IDD=67Temp=+25°C mA (typ.), Temp=+25°C DD=67
Parameter
Conditions
Units
Typical Value
Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Pout= +5 dBm/tone, Δf=1 MHz Noise figure (1)
900 21.2 11.4 15.6 +19 +32.7 0.55
1900 15.8 11.9 10.6 +18.8 +33 0.65
MHz dB dB dB dBm dBm dB
Notes: 1. Noise figure data shown in the table above is de-embedded from the eval board loss.
Performance Plots - TQP3M9035-PCB VDD = +3.3 V Test conditions unless otherwise noted: I DD = 67 mA, TCASE = +25°C, 50 Ω system Gain vs. Frequency
30
Input Return Loss vs. Frequency
0
Temp.=+25°C
Output Return Loss vs. Frequency
0
Temp.=+25°C
Temp.=+25°C
25 -5
-5
15
|S22| (dB)
|S11| (dB)
Gain (dB)
20 -10
-10
10 -15
-15
5 0
-20 0
500
1000
1500
2000
2500
3000
3500
4000
-20 0
500
1000
Frequency (MHz)
1500
2000
2500
3000
3500
4000
0
500
1000
Frequency (MHz)
OIP3 vs. Pout/tone
34
1500
2000
2500
3000
3500
4000
Frequency (MHz)
Noise Figure vs. Frequency
2
Temp.=+25 C 1 MHz tone spacing
1.5
NF (dB)
OIP3 (dBm)
1900 MHz 900 MHz
33 1
32 0.5
0
31
0
1
2
3
4
5
6
7
8
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
0
500
1000
1500
2000
2500
3000
3500
4000
Frequency (MHz)
Pout/Tone (dBm)
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TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
50-500 MHz IF Reference Design TQP3M9035 performance may be optimized for IF operation below 500 MHz by making suitable adjustments to the value of the bias inductor L1 and the DC blocking capacitors C1 and C2. When using the TriQuint evaluation board be sure to match the value of C5 and C6 to that of C1 and C2 for accurate loss de-embedding.
Typical Performance – 50-500 MHz Test conditions unless otherwise noted: L1=82 nH, C1-C2, C5-C6=1000 pF, VDD=+5V, IDD=115 mA (typ.), Temp=+25°C
Parameter
Conditions
Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Noise figure (1)
Units
Typical Value 50 28.8 8 16.7 +17.7 +32.9 0.64
Pout= +5 dBm/tone, Δf=1 MHz
100 28.3 12.5 16.8 +21.3 +40.3 0.52
200 27.7 15.2 15.9 +23 +38.8 0.56
500 25.4 15.4 14.5 +23.1 +38.9 0.56
MHz dB dB dB dBm dBm dB
Notes: 1. Noise figure data shown in the table above is de-embedded from the eval board loss.
Performance Plots – 50-500 MHz Test conditions unless otherwise noted: : L1=82 nH, C1-C2, C5-C6=1000 pF, VDD=+5V, IDD=115 mA (typ.), Temp=+25°C Gain vs. Frequency
30
Return Loss vs. Frequency
0
OIP3 vs. Frequency
45 Pout = 5dBm/tone 1MHz tone spacing
28 27 26
-5
Temp.=+25°C
40
OIP3 (dBm)
Return Loss (dB)
Gain (dB)
29
-10
-15
35
30 Input Return Loss Output Return Loss
25
-20 50
100
150
200
250
300
350
400
450
500
25
50
100
150
200
Frequency (MHz)
250
300
350
P1dB vs. Frequency
25
450
500
50
100
150
200
250
300
350
400
450
500
Frequency (MHz)
Noise Figure vs. Frequency
1
Temp.=+25°C
Temp.=+25°C
Noise Figure (dBm)
23
P1dB (dBm)
400
Frequency (MHz)
21
19
17
0.8
0.6
0.4
0.2
15
0 50
100
150
200
250
300
350
400
450
500
50
Frequency (MHz)
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
100
150
200
250
300
350
400
450
500
Frequency (MHz)
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Disclaimer: Subject to change without notice
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TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Pin Configuration and Description Pin 1 Reference Mark
NC
1
8
NC
RF In
2
7
RF Out
NC
3
6
Shut Down
NC
4
5
NC
Backside Paddle - RF/DC GND
Pin No.
Label
Description
2
RF In
RF Input pin. A DC Block is required.
6
Shut Down
A high voltage turns off the device. If the pin is not connected or is less than 1V, then the device will operate under its normal operating condition.
7
RF Out / DCBias
RF Output pin. DC bias will also need to be injected through a RF bias choke/inductor for operation.
1, 3, 4, 5, 8
NC
No electrical connection. Provide grounded land pads for PCB mounting integrity.
Backside Paddle
RF/DC GND
RF/DC ground. Use recommended via pattern to minimize inductance and thermal resistance; see PCB Mounting Pattern for suggested footprint.
Evaluation Board PCB Information
Qorvo PCB 1084112 Material and Stack-up
1 oz. Cu top layer 0.010"
Nelco N-4000-13 1 oz. Cu inner layer
0.062" ± 0.006" Finished Board Thickness
Core 1 oz. Cu inner layer
0.010"
Nelco N-4000-13 1 oz. Cu bottom layer
50 ohm line dimensions: width = .031”, spacing = .035”
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
- 9 of 11 -
Disclaimer: Subject to change without notice
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TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Mechanical Information Package Marking and Dimensions Marking: Part number – 9035 Lot Code – XXXX
2.00±0.05
Terminal 1 Identifier
2.00±0.05
9035 XXXX
TERMINAL #1 IDENTIFIER 0.200x45°
0.80±0.05 Exp. DAP
4 0.85±0.10
1.60±0.05 Exp. DAP
0.50 BSC
0.30±0.050
0.25±0.05
0.00-0.05
0.203 Ref
NOTES: 1. All dimensions are in millimeters. Angles are in degrees. 2. Except where noted, this part outline conforms to JEDEC standard MO-220, Issue E (Variation VGGC) for thermally enhanced plastic very thin fine pitch quad flat no lead package (QFN). 3. Dimension and tolerance formats conform to ASME Y14.4M-1994. 4. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012.
PCB Mounting Pattern
0.64
PACKAGE OUTLINE
0.50 PITCH, TYP
8X 0.30
8X 0.67 0.35 0.70
2X 0.20 3 3X
Ø.254 (.010) PLATED THRU VIA HOLES
1.60
NOTES: 1. All dimensions are in millimeters. Angles are in degrees. 2. Use 1 oz. copper minimum for top and bottom layer metal. 3. Vias are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25 mm (0.10”). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance.
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
- 10 of 11 -
Disclaimer: Subject to change without notice
www.triquint.com / www.qorvo.com
TQP3M9035 High Linearity LNA Gain Block
RFMD + TriQuint = Qorvo
Product Compliance Information ESD Sensitivity Ratings
Solderability Compatible with both lead-free (260 °C max. reflow temperature) and tin/lead (245 °C max. reflow temperature) soldering processes.
Caution! ESD-Sensitive Device
Package contact plating: NiPdAu ESD Rating: Value: Test: Standard:
Class 1A Passes ≥ 250 V to < 500 V Human Body Model (HBM) JEDEC Standard JESD22-A114
ESD Rating: Value: Test: Standard:
Class C3 Passes ≥ 1000 V Charged Device Model (CDM) JEDEC Standard JESD22-C101
RoHs Compliance This part is compliant with EU 2002/95/EC RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment). This product also has the following attributes: Lead Free Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (C15H12Br402) Free PFOS Free SVHC Free
MSL Rating MSL Rating: Level 1 Test: 260°C convection reflow Standard: JEDEC Standard IPC/JEDEC J-STD-020
Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: www.triquint.com Email:
[email protected]
Tel: 877-800-8584
For information about the merger of RFMD and TriQuint as Qorvo: Web:
www.qorvo.com
For technical questions and application information: Email:
[email protected]
Important Notice The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for TriQuint products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.
Datasheet Rev. J 01-25-16 © 2016 TriQuint Semiconductor, Inc
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Disclaimer: Subject to change without notice
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