Transcript
RS-232 Tra ns ce ive r
COM1 RS-485 Drive r
C112 5V
C126
U9 3
DEBUG_TXD
2.9V < -- 5V
1
UART1_TXD
6
.1 uF
AN_0
VCC
AN_1
COM
SEL
Le ve l s hift e r
GND
5V
R50
5
CPU_3.3V
CPU_3.3V
.1 uF
C114
4
U7
C115
2 .1 uF
.1 uF
11
C1+
15
4
TXD0_485
13
.1 uF
1
RXD0_485_5V
C1V-
3
TXEN_0
17
R112 3.92K
U4
C113
.1 uF
Vcc V+
14
C116
NC7SB3157P6
12
12.1K
2
C2+
TXD
VCC
RXD
X+
TXEN
XGND
RXEN#
8 6
COM1_485+
7
COM1_485-
5
C140 16
D5 .1 uF
7 3
CPU_3.3V
UART2_TXD
2
42.2K
UART3_TXD BAT54-CC
U23
UART5_TXD 1 19 2
RX_232
3
UART2_RXD
4
UART3_RXD
5
UART5_RXD RXD0_485
6
RXD4_485
7 8
422_RXD
9
CAN_RXD
DIR
20
VCC
2.9V
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
3
T2
20
1
T3
21
28
T4
9
R1
5
18
4
R2
COM1_TXD COM1_RTS COM2_TXD COM3_TXD
COM1_RXD COM1_CTS
17 26 22
15 14
RXD0_485_5V
13
RXD4_485_5V
12
RXD_422_5V
11
CAN_RXD_5V
CTS_UART5_5V OFF_BD_RESET#
18
R5 EN_RX
SD#
25
COM2_RXD COM3_RXD COM3_CTS
COM2 RS-485 Drive r
EN_232
GND
10
GND
23
R4
19 24
27
R3
16
B8
A8
6
8
OE
2
T1
1
R18
R102 3.92K
C2-
R113 3.92K
ISL8485_5V
SP213
10
SIPEX
74LVC245
3
5V
R51
U8 DEBUG_RXD
C124
CPU_3.3V
AN_0
VCC
AN_1
COM
5
.1 uF 12.1K
CPU_3.3V
R111 3.92K
U3 1
UART1_RXD
6
SEL
GND
4
RX_232
2
4
TXD4_485
1
RXD4_485_5V
3
TXEN_4 NC7SB3157P6
2 R103 3.92K
TXD
VCC
RXD
X+
TXEN
X-
RXEN#
GND
8 6
COM2_485+
7
COM2_485-
5 R110 3.92K
ISL8485_5V
Force Cons ole R52 CPU_3.3V 12.1K
CAN1 Tra nce ive r JP2
COM2 RS-422 Re ce ive r
R72 270
5V
5V
CAN1_STBY CAN_TXD CAN_RXD_5V
8 1 4
STDBY TXD
R73
C117 .1 uF
U17 VCC CANH
RXD
CANL
VREF
GND
270
3
1
RXD_422_5V
3
7
R104 3.92K
U5 4
CAN_H 2
6
TXD
VCC
RXD
X+
TXEN RXEN#
XGND
8 6
COM2_422_RX-
5
CAN_L ISL8485_5V
5
COM2_422_RX+
7
2 1
R106 3.92K
2
TJA1040T
TV9 R74 270
R75 270
24V 30V bre a k 3
TJA1040T ha s low powe r STBY mode
C141 .1 uF
NUP2105L
Te chnologic Sys t e ms Tit le : Re v:
TS-8160
Nov. 3, 2010
RS-232, RS-485, CAN De s igne r
She e t
1 of
10
COM Conne ct ors a nd He a de rs COM1 J1
DB-9M 1 6 4 9
3
COM1_TXD
7
COM1_RTS
2
COM1_RXD
8
COM1_CTS
5
DB9M
TX+ _(DCD)
COM2
TX-_(DSR) RX+ _(DTR) RX-_(RI)
He a de r
TXD
RXD
HD4
10
FRAME1
FRAME
HD6
CTS GND
COM2_485+
11
FRAME2 CON-DB9
COM2_422_RX+ COM2_422_RX-
COM1 He a de r
HD3
COM1_485+
6
COM1_485-
4
CAN_H
9
CAN_L
He a de r
RTS
COM2_485-
1
COM3
TX+ _(DCD) TX-_(DSR) RX+ _CANH_(DTR)
1
TX+ _(DCD) 1
6
TX-_(DSR) 6
4
RX+ _CANH_(DTR)
9
CAN2_H
RX-_CANL_(RI)
CAN2_L COM2_TXD
3
TXD
7 COM2_RXD
NC
COM3_TXD
RXD
8
GND
9
TX-_(DSR) RX+ _CANH_(DTR) RX-_CANL_(RI)
10
RTS
2
4
TX+ _(DCD)
3 7
5 COM3_RXD
CTS
COM3_CTS
RX-_CANL_(RI)
2 8
TXD
NC
10
RTS RXD
GND
5
CTS
HD_COM_HEAD10 3 7 2 8
TXD
NC
HD_COM_HEAD10
10
RTS RXD
GND
5
CTS
HD_COM_HEAD10
5V --> 3.3V
14.3 MHz Os c.
CPU_3.3V
U21
R34
CAN Tra nce ive r
ISA_14.3_MHZ 1
50
19 PLD_14.3_MHZ 1
CAN2_STBY CAN2_TXD CAN2_RXD_5V
1 4 5
STDBY
VCC
TXD
CANH
RXD
CANL
VREF
GND
3
GND
VCC
EN_OSC
50
4 FB14
4
OSC_POWER C138 .1 uF
CTS_UART5_5V
5
CAN2_RXD_5V
6
ISA_IRQ5
7
ISA_IRQ6
7
CAN2_H
R15
ISA_IRQ7
6 CAN2_L
9
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8 GND
C22 2
20
Y1
18
OSC_POWER
17 16 15
UART5_CTS#
14
CAN2_RXD
13
IRQ5
12
IRQ6
11
IRQ7
10
74LVC245
22pF
TV8
R44 100
30V bre a k 3
NUP2105L
Provide s 5V Tole ra nce
XTAL-HC49
24V
C143 .1 uF
8
A1
1.0M
2
R43 100
2 3
5
74LVC2GU04
1 TJA1040T
6
3
C144 .1 uF
U12 8
2
VCC OE
R35
U15
5V
DIR
C23 22pF
14.3 MHz
C24 22pF
Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 DB9, COM He a de rs De s igne r
She e t
2
of 10
Ext e rna l Dua l USB FB1 USB_5V
USB Powe r Swit ch
J8
1 2
EN_USB_5V
EN_A FLT_A#
Top Port
5V
4 3
EN_B FLT_B#
OUT_B
1
GND
7
3
8
.1 uF C111
6
.1 uF
MIC2026-1BM
2
4
D1
D2
USB_HOSTA_P
9 FRAME 10 FRAME 11 FRAME 12 FRAME
CONN_USB_DUAL
V+ GND
TV4
C121
USB_5V
5
5 6 7 8
USB_HOSTA_M TV3
C131 .1 uF 5V
OUT_A
Dua l USB
USB_OTG_P
U29 5V
1 2 3 4
Bot t om Port USB_OTG_M
BGX50A 1
5V R30
3 USB_OTG_5V
2
4
D1
D2
FRAME FB9
V+ GND
C139
50
.1 uF
BGX50A
1400 mA t yp. curre nt limit
LCD Powe r Swit ch
SATA Port C304 SATA_RX+ 10 nF
GND
8
TXTX+
6 5 3 2
C305 EN_LCD_5V SATA_RX-
1 2
5V EN_A FLT_A#
OUT_A
7 8
LCD_5V
10 nF C306 SATA_TX10 nF
FRM
GND FRM
1
RX+ RX-
9
4
GND
5V
U28
CN9 7
4 3
EN_B FLT_B#
OUT_B GND
5
C105
6
.1 uF
MIC2026-1BM
C307 SATA_TX+
CN_SATA_VERT
10 nF
1400 mA t yp. curre nt limit
Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 USB Hub De s igne r
She e t
3
of
10
DIO a nd LCD a nd SATA LCD Port
U20
23
VCC BE# NC
2
LCD_D1
DIO Port
3
LCD_D3
4
LCD_D5
5
LCD_D7
6
LCD_D6
7
LCD_D4
DIO_PIN_[01: 15]
8
LCD_D2
9
LCD_D0 CN10
10
SPI_MISO_5V
11 R31
CPU_3.3V
SPI_CLK 50
SPI_MOSI
SPI_MISO_5V R105 CPU_3.3V
I2C_DAT SPI_CS#
3.92K
I2C_CLK
16
15
DIO_PIN_15
14
13
DIO_PIN_13
12
11
10
9
DIO_PIN_09
8
7
DIO_PIN_07
6
5
DIO_PIN_05
4
3
DIO_PIN_03
2
1
DIO_PIN_01
A0
B0
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9 GND
24
4.3V
1 22 21 20 19 18 17 HD14PIN
16 15 14
SPI_MISO
13
13
12
11
10
9
8
7
12
QS3861
DIO_PIN_11
14
6
LCD_WR#
4
LCD_BIAS
5
WR# RS
2
R32
3
LCD_EN 50
1
LCD_RS
Provide s 5V t ole ra nce CN8 LCD_5V
HEADER16
Wa rning:
All LCD pins a re bi-dire ct iona l DIO
LCD_D0 t hru LCD_D7 a re 5V t ole ra nt
Wa rning:
LCD_WR# , LCD_RS, a nd LCD_EN a re not !
DIO a re not 5V t ole ra nt ! Only SPI_MISO is 5V t ole ra nt
R117 DIO_PIN_15
CPU_3.3V 3.92K
R118 DIO_PIN_13
4.3V Supply
3.92K
R119 DIO_PIN_11
LCD PWM Filt e r
3.92K 5V R120
3
DIO_PIN_09
5V
Q1
1
3.92K
2 R121
4.3V
DIO_PIN_07
3 R19
3.92K
LCD_BIAS_PWM
1
42.2K C142 .1 uF R122
-
5 U18
+
2
4
LCD_BIAS
LMV321_DCK
C108
R16 42.2K
.1 uF
DIO_PIN_05 3.92K
R123 DIO_PIN_03 3.92K
R124 DIO_PIN_01 3.92K
Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 DIO, LCD De s igne r
She e t
4
of 10
Input Powe r 4.7V t o 5.4V
5V Powe r Supply (3.0 Amps )
or 6.0V t o 30V
5V
7
-
1
D2
BOOST VIN SW
1
C45 10 uF 50V
C69
2
TVS-28V
.1 uF
CONN_POWER_2P
C68
2
.1 uF
3
D3
FB7
R57 12.1K
8
C98
C99
470 uF
470 uF
10V
10V
NC1 NC2
50V 5
50V
22 uH
10 nF U6 FB5
CN3 +
5.04V nomina l
VIN
PF3 PTC_1.5A_33V
FB2
L1
C303
122 mohm t yp.
Powe r Conn.
5V
VIN
CASE_GND
1SMB28AT3G
9
600W
FB
ENABLE
4
8x11.5 mm
R101 3.92K
120 mohm
GND 6
493-1743-ND TPS5430
EN_BUCK
5V Re gula t or Bypa s s
Ze ne r kne e a t 31-34V for 1 mA of curre nt
30V = VDS ma x
13 Amps @ 45V
65/ 80 mohms @ Vgs = 4.5V Q4 1
5
S
2
Q6 a nd Q7 a re BC857C
Wa rning:
D
3
VIN
= high ga in PNP
7
FDS9435
8
G 4
6-35 uA
FET t urns OFF
NV_3.3V
whe n Vin > 5.6V
R48
Whe n Vin is be t we e n 5.4V a nd 6.0V
25 uA
6 uA
12.1K
The n ba ck ON whe n Vin < 5.4V
3
The 5V ra il ca n fa ll be low 4.5V
C70
This me a ns t he SBC ma y re s e t
D9 BAV199
R25 42.2K
.1 uF
R28 604K
R20 249K
3
2.2V 1 2
Q6
1.57V
5V
6
2
Q7 2
1
1
1
Q2
2
1.62V 3
3
Adjus t R28 for R21
R22
249K
249K
5.5V t rip point
R39 42.2K
GND R38 2.5M
R26 54.9K
Adjus t R39 a nd R26 for t he hys t e re s is
NV_3.3V
Sum mus t = 90K
3 Q3
1
R60
2
Us e ope n dra in drive
1.2K
CPU_3.3V R27 54.9K
EN_BYPASS
CPU_3.3V
C127 .1 uF
C128 .1 uF
C129 .1 uF
C130 .1 uF
C132 .1 uF
C133 .1 uF
C134 .1 uF
C135 .1 uF
C123 .1 uF
C137 .1 uF
Turns P-FET (Q4) on whe n Vin < 5.5V nomina l Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 5V Powe r, a nd Bypa s s De s igne r
She e t
5
of 10
SBC
Boa rd ID = 6
10/ 100 Et he rne t
U25 4 3 2.9V
2 1 15 14
R55 12.1K
R49 12.1K
13 12
VCC
Y0
16
Y1
2.9V C136 .1 uF
Y2
J7
Y3 ETH_RX+ Y4 OUT
Y5
5
ETH_RX-
BD_ID_DATA
Y6
4 5
6
RX+ RX-
RX_CT
Y7
ALIGN ALIGN
11
RED_LED#
10
GREEN_LED# BUS_DIR
9
7
OUT#
S0
17 18
ETH_CT
6
S1 3 S2
TX_CT POE_RX
GND
EN#
8 ETH_TX+ ETH_TX-
1 2
POE_TX TX-
74HC251
POE_78
R76 ETH2_ACT_LED
a re 2nd s ource s in SOIC
270
11 12
R77 270
13 14
9 10
LLED+ LLED-
Gre e n SHD
ETH2_SPEED_LED
8
TX+ POE_45
74AC151, 74AC251, 74HC151
7
SHD
15 16
RLED+ RLED-
Ye llow
RJ_POE_4602
EC-MJKF4602-PA08
FRAME
LEDs RTC Ba t t e ry
FB10
CPU_3.3V
A LED2
V_BAT
Gre e n LED
A
Re d LED
LED1 K
K
R70
K2
RED_LED# 270
R71 R66 1.2K
GREEN_LED# 270
Force Boot t o SD ca rd
MT2
1 MT125
R65
MT1
1 MT125
OFF_BD_RESET#
BUS_DIR 1.2K
Nov. 3, 2010
Te chnologic Sys t e ms
1.2K s hould be ne a r CN1
Tit le : TS-8160 Et he rne t , Ba t t e ry, Boa rd ID Re v:
De s igne r
RLM
She e t
6
of
10
PLD
Input s on Le ft
Out put s on Right
PC/ 104
U19
PLD_JTAG_TCK PLD_JTAG_TDI DIO_PIN_[01: 15]
PLD_JTAG_TDO PLD_JTAG_TMS
24 23 25 22
9 VCCIO 31 VCCIO 45 VCCIO 59 VCCIO 80 VCCIO 94 VCCIO
TCK TDI TDO
64-pin Conne ct or
CPU_3.3V
1.8V
TMS 13 VCCINT 63 VCCINT
DIO_PIN_15
43
DIO_PIN_13
73
DIO_PIN_11
29
DIO_PIN_09
36
IO
VCCINT/ IO
IO
VCCINT/ IO
20
DIO_PIN_05
48
DIO_PIN_03
49
DIO_PIN_01
6 81
EN_OSC
34
EN_232 EN_LCD_5V
44 1
OFF_BD_RESET#
IO
IO
IO
IO
IO
IO IO
IO
IO
IO IO
IO
IO
72
AVR_MOSI
33
AVR_MISO
on t he TS-8100
AVR_SCLK AVR_RESET
89 91
IO IO
IO
IN
IO
IO IO
IO
IN
IO
IO
IO
IO
IO CAN1_STBY
AD_[00: 15]
CAN2_STBY PLD_CLK
30
AD_15
2
AD_14
98
AD_13
3
AD_12
99 86
AD_11 AD_10
8
AD_09
78
AD_08
85
AD_07
95
AD_06
87
AD_05
12
AD_04
28
AD_03
15
AD_02
16
AD_01
40
AD_00
41 75
BUS_ALE#
84
BUS_CS# BUS_DIR
a nd Da t a Bus
92 97
ISA_WAIT#
MUXe d Addre s s
100
PLD_14.3_MHZ
18 14
60 65 79 93
NC
88
NC
CN7 LCD_D[0: 7]
26
LCD_D7
17
LCD_D6
21
LCD_D5
71
LCD_D4
70
LCD_D3
68
LCD_D2
66
LCD_D1
67
LCD_D0
C88
C107
1 uF
.1 uF
IO
IO IO IO IO
IO
IN IN
IO IO IO
IO
Pla ce C88 a nd C107 ne a r U19
LCD_WR#
38
LCD_RS
42
50 82 76 96 47 27 35 7
AD_07
18
AD_06
17
AD_05
16
AD_04
15
AD_03
14
AD_02
13
AD_01
12
AD_00
11 10
LCD_BIAS_PWM
NC
VCC OE
LCD_EN
77
DIR
1
BUS_DIR
19
ISA_CS#
BUS_BHE#
AD_[00: 15]
B1
A1
B2
A2
B3
A3
B4 B5
A4 A5
B6
A6
B7
A7
B8
A8
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
A9
IO
IO
IO
IO
IO IO
IO IO
IO
IO
CLK3
IN
CLK4 IO
IO
74 83 52 51
GND
IOCHK#
74LVC245
+ 5V
D6
IRQ9
D5 -5V D4 DRQ2 D3 -12V D2 ENDX#
R64
on t he TS-8100
A11
+ 12V
D0
MEMW#
AEN
MEMR#
IO
IO
IO IO
IO
DIO_A19
IOW# A12
DIO_A20
A13
DIO_A21 DIO_B11
A15
DIO_B12
DIO_A16
ISA_IOR# ISA_IOW#
DIO_A17
ISA_ADD_[0: 9]
DIO_A18
69
ISA_ADD_9
DIO_A19
62
ISA_ADD_8
DIO_A20
64
ISA_ADD_7
DIO_A21
5
ISA_ADD_6
A16 A17 A18 A19 A20 A21
A19
IOR#
A18 DACK3#
A17
DRQ3
A16 A15
DACK1#
A14
DRQ1
A13
RFRSH#
A12
BCLK
A11 IRQ7
A10
IRQ6 IRQ5
61
ISA_ADD_5
ISA_ADD_9
A22
58
ISA_ADD_4
ISA_ADD_8
A23
57
ISA_ADD_3
ISA_ADD_7
A24
56
ISA_ADD_2
ISA_ADD_6
A25
ISA_ADD_5
A26
55
ISA_ADD_1
ISA_ADD_4
A27
ISA_ADD_0
ISA_ADD_3
A28
ISA_CS#
ISA_ADD_2
A29
BUS_WAIT#
ISA_ADD_1
A30
ISA_ADD_0
A31
IO IO
IO
IO
IO IO
IO IO IO CLK2
IO
IN
GND/ IO GND/ IO
53 54 4 37
A9
IRQ3
A8 DACK2#
A7 A6
TC
A5
MAX2_570
B5
5V AD_08 CPU_3.3V
B6 B7 B8 B9
VIN
B10
B11 B12
DIO_B11 DIO_B12
BALE
A3
ISA_ADD_[0: 9]
A32
B14
ISA_IOW# ISA_IOR#
B15 B16 B17 B18
AD_09 AD_10
B19 B20
AD_12
B21
ISA_IRQ7
B22
ISA_IRQ6
B23
ISA_IRQ5
B24 B25 B26 B27 B28
AD_11 AD_13
R114 3.92K
R115 3.92K
R116 3.92K
AD_14
+ 5V
B29
AD_15 5V
A2 A1
OSC
B30
ISA_14.3_MHZ
A0 GND
Out put s
B13
A4
90
10 GND 11 GND 32 GND 46 GND
GND GND GND GND
B4
ISA_RESET
DIO_A18
IRQ4 IO
B3
1.2K
IO CLK1
B2
IORDY
CPU_3.3V
Provide s 5V t ole ra nce
B1
D1
(KEY) A10
ISA_WAIT#
pin 50 is USB_RESET# DIO_A17
D7
GND
ISA_RESET DIO_A16
A1
A14
IO
IO
19
CPU_3.3V
20
RESET
IO
IO
pin 30 is PLD_24MHZ
U22
39
IO IO
DIO_PIN_07
PLD_1.8V
GND
GND
PC104_64-PIN
66
B31 B32
65
DIO_A16 t hru DIO_A21 a nd LCD_EN s hould de fa ult t o logic ze ro
EPM240G DIO_B11 a nd DIO_B12 EPM240G 1.8V s t a t ic curre nt is 2mA t ypica l Tra ns ie nt t urn-on is < 50 mA
s hould de fa ult t o logic "1" EN_232, EN_OSC, CAN1_STBY a nd CAN2_STBY mus t de fa ult t o a logic one
AVR SPI bus out put s : AVR_MOSI AVR_SCLK AVR_RESET mus t init ia lize t o ze ro
Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 PLD, PC/ 104 bus De s igne r
She e t
7
of 10
16-bit A/ D Conve rt e r
Four s ingle -e nde d 0-10V Input s Two diffe re nt ia l pa irs 0-2V ra nge
TV6 TV5
A/ D He a de r
1
5V
3
2
4
D1
D2
1
5V V+
3
GND
4 D2
V+ GND
C118
C119
BGX50A
.1 uF
BGX50A
.1 uF
2 D1
HD5 16
15
14
13
R63 1.2K
12
11
10
9
8
7
6
5
4
3
R33
R62
AN_3.3V
C83
1.2K
CPU_3.3V 50
1 uF C120
R61
.1 uF 1 uF
1.2K
2
VDD CH_1SDA
3
1 uF
8.06K 0.1%
4 R83 2.00K
6
CH_1+
C80
R93
HD-16-3
1
1 uF
1.2K
C27 10 uF 6.3V
U13
C81
R67
1
2
C82
CH_2+ SCL
7
ADC_DAT
8
ADC_CLK
CH_2-
C84 11
1 uF
12
CH_3+
A1
10
R108 3.92K
R109 3.92K
CH_3A0
U10
9 CPU_3.3V
3 R94
1
8.06K 0.1%
6 R81 2.00K
AN_0
VCC
AN_1
COM
SEL
GND
5
13
AN_3.3V
14
4 2
CH_4+ CH_4-
GND
5
MCP3428
C85 NC7SB3157P6 1 uF
U11 R95
3
8.06K 0.1%
1 R82 2.00K
C87
6
AN_0
VCC
AN_1
COM
SEL
GND
5
AN_3.3V
4 2
1 uF NC7SB3157P6
AN_SEL
R96 8.06K 0.1% R80 2.00K
C86 1 uF
Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 Ana log De s igne r
She e t
8
of 10
NV_3V
AVR
R88 VIN
MicroCont rolle r
1.50M R85 150K 1.0%
NV_3.3V
C125 C109
Gre e n A
.1 uF C110
U24
.1 uF
.1 uF 20
VCC
AREF
VCC 19 22 23 24 25 26
Y2
7
1
4
2
3
C25 22pF
8
Input
9
Out put
10
AVR_PUSH_SW#
C26 22pF
EN_BYPASS
XTAL_SMT_8X3
11
ADC6 AVCC
PD0/ RXD PC1/ ADC1 PD1/ TXD PC2/ ADC2 PD4/ INT20/ XCK
Input
13
OFF_BD_RESET#
27 28
I2C_CLK
Pus h Swit ch ca n
low t o go int o Sle e p mode
18 R78 270
Curre nt dra in s hould be < 150 uA
30 31 2
PD2/ INT18
32
PB6/ TOSC1/ INT6 PB7/ TOSC2/ INT7
PD3/ INT19/ OC2B
PD5/ INT21/ OCOB PC6/ RESET#
1
Out put
EN_BUCK
29
PD6/ INT22/ OCOA PB2/ SS# / OC1B
PD7/ INT23/ AIN1
PB4/ INT4/ MISO PB0/ INT0/ CLK0 PB5/ INT5/ SCK
14
AVR_RESET#
15
AVR_MOSI
16
Us e d t o progra m
AVR_MISO
17
AVR_SCLK
AVR
PB1/ INT1/ OC1A GND
I2C_DAT
6
PC3/ ADC3
PB3/ INT3/ MOSI 12
Drive EN_BYPASS a nd EN_BUCK
K
4
ADC7 PC0/ ADC0
LED
LED3
PC4/ ADC4/ SDA
GND
PC5/ ADC5/ SCL
GND
wa ke up AVR a ls o
3 5 21
ATMEGA48
ATMe ga 48V-10AU
NV 3.3V Re gula t or for AVR D7
1
CPU_3.3V
3
U26 2
AVR_PUSH_SW#
Pus h Swit ch
CPU_3.3V 4
VIN D6
SW1
R107 3.92K
VOUT
50
SENSE
.1 uF
5
ENABLE
GND
2 2 3 4
PAD
PUSHSW_RT
BAT54-CC
U14 1
FRAME
2 NV_3.3V 3
1
BAT54-CC C28 10 uF
3
NV_3.3V
VIN
C67
1 1
VOUT
R36
6
6.3V
7
LT3008EDC-3.3 SBC_PUSH_SW#
20 mA ma x loa d
6
5 uA quie s ce nt 2
GND
VCC
5
NV_3.3V
45V ma x Input 3 R53 12.1K
4
74LVC2GU04
AVR_RESET#
C106 .1 uF
NV_3.3V R68 AVR_RESET 1.2K
Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 AVR a nd Pus h Swit ch De s igne r
She e t
9
of 10
Two 100-pin Module Conne ct ors
Right
Le ft CN1
OFF_BD_RESET# is a n Out put from 1
2
3
4
5
6
7
8
9
10
NC NC
11
12
13
14
15
16
NC
17
18
19
20
21
t he SBC us e d t o re s e t a ll pe riphe ra ls
OFF_BD_RESET#
POWER
FB8 5V
C122 .1 uF
TXEN_4 422_RXD TXEN_0 CAN2_RXD CAN2_TXD SBC_PUSH_SW# AN_SEL ADC_CLK ADC_DAT BD_ID_DATA UART5_CTS# PLD_CLK IRQ7 IRQ6 IRQ5 BUS_WAIT# BUS_BHE#
CN2 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22
21
22
23
24
23
24
25
26
25
26
27
28
27
28
29
30
29
30
31
32
31
32
33
34
33
34
35
36
35
36
37
38
37
38
39
40
39
40
41
42
41
42
43
44
43
44
45
46
45
46
47
48
47
48
49
50
49
50
51
52
51
52
53
54
53
54
55
56
55
56
57
58
57
58
59
60
59
60
61
62
61
62
63
64
63
64
65
66
AD_14
65
66
67
68
AD_13
67
68
69
70
AD_12
69
70
71
72
AD_11
71
72
73
74
AD_10
73
74
75
76
AD_09
75
76
77
78
AD_08
77
78
79
80
AD_07
79
80
81
82
AD_06
81
82
83
84
AD_05
83
84
85
86
AD_04
85
86
87
88
AD_03
87
88
89
90
AD_02
89
90
91
92
AD_01
91
92
93
94
AD_00
93
94
95
96
95
96
97
98
97
98
99
100
99
100
TYCO_100PIN
ETH_RX+ EN_USB_5V
ETH_RX-
Et he rne t
ETH_CT ETH_TX+ ETH_TXETH_CT
POWER SATA_RXSATA_RX+
NC NC
FB11 CPU_3.3V
TS-8160 ba s e boa rd
V_BAT
USB Port s
USB_HOSTA_M USB_HOSTA_P USB_OTG_M USB_OTG_P
re quire s < 50 mA of CPU_3.3V curre nt
SATA_TXSATA_TX+
FB3
TS-8160 ba s e boa rd
PLD_1.8V
re quire s < 50 mA AD_15
BUS_ALE# BUS_DIR BUS_CS#
AD_[00: 15]
of 1.8V curre nt SPI_CS#
t ra ns ie nt a t powe r on
SPI_MOSI SPI_MISO
< 10 mA s t e a dy s t a t e
SPI_CLK
Cons ole
DEBUG_TXD DEBUG_RXD CAN_TXD CAN_RXD
ETH2_ACT_LED ETH2_SPEED_LED RED_LED# GREEN_LED#
I2C_CLK I2C_DAT
I2C
PLD_JTAG_TMS PLD_JTAG_TCK PLD_JTAG_TDO PLD_JTAG_TDI
USB_OTG_ID
GND = Hos t mode
USB_OTG_5V TXD0_485 RXD0_485 UART1_TXD UART1_RXD UART2_TXD UART2_RXD UART3_TXD
Se ria l Port s
UART3_RXD
or DIO
TXD4_485 RXD4_485 UART5_TXD UART5_RXD
TYCO_100PIN
Boot St ra p SBC BUS_DIR
Boot s from
1
NAND Fla s h
0
SD Ca rd
BUS_DIR s t a t e is
BUS_DIR ha s a
la t che d prior t o
12K pull-up re s is t or
OFF_BD_RESET#
on t he SBC module
de a s s e rt e d Us e 1.2K ohm re s is t or t o OFF_BD_RESET# t o s t ra p logic low
Te chnologic Sys t e ms Tit le : Re v:
Nov. 3, 2010
TS-8160 TS-Socke t Conne ct ors De s igne r
She e t
10 of
10
