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Uln2001a, Uln2002a, Uln2003a, Uln2004a Darlington Transistor Arrays D

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ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS D D D D D D 500-mA Rated Collector Current (Single Output) High-Voltage Outputs . . . 50 V Output Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver Applications Designed to Be Interchangeable With Sprague ULN2001A Series D OR N PACKAGE (TOP VIEW) 1B 2B 3B 4B 5B 6B 7B E description 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 1C 2C 3C 4C 5C 6C 7C COM The ULN2001A, ULN2002A, ULN2003A, and ULN2004A are monolithic high-voltage, high-current Darlington transistor arrays. Each consists of seven npn Darlington pairs that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The collector-current rating of a single Darlington pair is 500 mA. The Darlington pairs may be paralleled for higher current capability. Applications include relay drivers, hammer drivers, lamp drivers, display drivers (LED and gas discharge), line drivers, and logic buffers. For 100-V (otherwise interchangeable) versions, see the SN75465 through SN75469. The ULN2001A is a general-purpose array and can be used with TTL and CMOS technologies. The ULN2002A is specifically designed for use with 14- to 25-V PMOS devices. Each input of this device has a zener diode and resistor in series to control the input current to a safe limit. The ULN2003A has a 2.7-kΩ series base resistor for each Darlington pair for operation directly with TTL or 5-V CMOS devices. The ULN2004A has a 10.5-kΩ series base resistor to allow its operation directly from CMOS devices that use supply voltages of 6 to 15 V. The required input current of the ULN2004A is below that of the ULN2003A, and the required voltage is less than that required by the ULN2002A. logic symbol† logic diagram 9 CLAMP 1B 2B 3B 4B 5B 6B 7B 1 16 2 15 3 14 4 13 5 12 6 11 7 10 9 COM 1B 1C 2C 2B 3C 4C 3B 5C 6C 4B 7C † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 5B 6B 7B 1 16 2 15 3 14 4 13 5 12 6 11 7 10 COM 1C 2C 3C 4C 5C 6C 7C Copyright  1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 schematics (each Darlington pair) COM COM 7V Output C Output C Input B Input B 10.5 kΩ 7.2 kΩ E 7.2 kΩ 3 kΩ 3 kΩ E ULN2002A ULN2001A COM RB Output C Input B ULN2003A: RB = 2.7 kΩ ULN2004A: RB = 10.5 kΩ 7.2 kΩ 3 kΩ E ULN2003A, ULN2004A All resistor values shown are nominal. absolute maximum ratings at 25°C free-air temperature (unless otherwise noted) Collector-emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V Input voltage, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V Peak collector current (see Figures 14 and 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA Output clamp current, IOK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA Total emitter-terminal current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 2.5 A Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 20°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C NOTE 1: All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted. DISSIPATION RATING TABLE TA = 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 85°C POWER RATING D 950 mW 7.6 mW/°C 494 mW N 1150 mW 9.2 mW/°C 598 mW PACKAGE 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 electrical characteristics, TA = 25°C (unless otherwise noted) PARAMETER VI(on) On-state input voltage TEST FIGURE 6 TEST CONDITIONS VCE = 2 V, II = 250 µA, IC = 300 mA IC = 100 mA IC = 200 mA IC = 350 mA VCE(sat) ( ) Collector-emitter C ll t itt saturation voltage 5 II = 350 µA, II = 500 µA, VF Clamp forward voltage 8 IF = 350 mA VCE = 50 V, ICEX Collector cutoff current 1 2 VCE = 50 V,, TA = 70°C VCE = 50 V,, TA = 70°C II(off) I( ff) Off state input current Off-state 3 II Input current 4 IR Clamp reverse current 7 hFE Static forward current transfer ratio 5 Ci Input capacitance VI = 17 V VR = 50 V, ULN2001A MIN MAX TYP MAX 0.9 1.1 0.9 1.1 MIN 1 1.3 1 1.3 1.2 1.6 1.2 1.6 1.7 2 1.7 2 13 II = 0 II = 0 VI = 6 V IC = 500 µ µA, ULN2002A TYP 50 50 100 100 50 65 50 VR = 50 V VI = 0, f = 1 MHz V V µA µA 65 0.82 IC = 350 mA V 500 TA = 70°C VCE = 2 V, UNIT 1.25 100 100 50 50 mA µA 1000 15 25 15 25 pF electrical characteristics, TA = 25°C (unless otherwise noted) PARAMETER TEST FIGURE TEST CONDITIONS ULN2003A MIN TYP IC = 125 mA IC = 200 mA VI( I(on)) VCE(sat) ( ) ICEX On state input voltage On-state Collector-emitter C ll t itt saturation voltage Collector cutoff current 6 VCE = 2 V MAX IC = 250 mA IC = 275 mA 2.7 IC = 300 mA IC = 350 mA 3 6 7 1.1 5 1 1.3 1 1.3 II = 500 µA, VCE = 50 V, IC = 350 mA II = 0 1.2 1.6 1.2 1.6 1 2 VCE = 50 V,, TA = 70°C II = 0 VI = 1 V Off state input current Off-state 3 VCE = 50 V,, TA = 70°C II Input current 4 7 50 VI = 3.85 V VI = 5 V 0.93 TA = 70°C f = 1 MHz POST OFFICE BOX 655303 50 100 100 • DALLAS, TEXAS 75265 2 65 VI = 12 V VR = 50 V VR = 50 V, VI = 0, 50 V µA 500 1.7 IC = 500 µ µA,, V 8 0.9 II(off) I( ff) UNIT 5 2.4 1.1 IF = 350 mA Input capacitance TYP 0.9 8 Ci MIN IC = 100 mA IC = 200 mA Clamp forward voltage Clamp reverse current MAX II = 250 µA, II = 350 µA, VF IR ULN2004A 15 1.7 50 2 V µA 65 1.35 0.35 0.5 1 1.45 50 50 100 100 25 15 25 mA µA pF 3 ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 switching characteristics, TA = 25°C PARAMETER tPLH tPHL TEST CONDITIONS Propagation delay time, low-to-high-level output See Figure 9 Propagation delay time, high-to-low-level output VOH MIN IO ≈ 300 mA, VS = 50 V, See Figure 10 High-level output voltage after switching TYP MAX 0.25 1 UNIT µs 0.25 1 µs VS – 20 mV PARAMETER MEASUREMENT INFORMATION Open Open VCE ICEX VCE ICEX Open VI Figure 1. ICEX Test Circuit Open Figure 2. ICEX Test Circuit VCE Open II(off) IC II(on) Open VI Figure 3. II(off) Test Circuit Figure 4. II Test Circuit Open Open IC hFE = II II VCE IC VI(on) VCE NOTE: II is fixed for measuring VCE(sat), variable for measuring hFE. Figure 5. hFE, VCE(sat) Test Circuit 4 POST OFFICE BOX 655303 Figure 6. VI(on) Test Circuit • DALLAS, TEXAS 75265 IC ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 PARAMETER MEASUREMENT INFORMATION VR IR VF Open IF Open Figure 7. IR Test Circuit Figure 8. VF Test Circuit 50% Input 50% t PHL t PLH 50% Output 50% VOLTAGE WAVEFORMS Figure 9. Propagation Delay Time Waveforms VS Input Open ULN2001A only 2.7 kΩ Pulse Generator (see Note A) 2 mH 1N3064 200 Ω Output ULN2002A ULN2003A ULN2004A CL = 15 pF (see Note B) TEST CIRCUIT ≤ 5 ns ≤ 10 ns 90% 1.5 V Input 10% VIH (see Note C) 90% 1.5 V 10% 40 µs 0V VOH Output VOL VOLTAGE WAVEFORMS NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, ZO = 50 Ω. B. CL includes probe and jig capacitance. C. For testing the ULN2001A and the ULN2003A, VIH = 3 V; for the ULN2002A, VIH = 13 V; for the ULN2004A, VIH = 8 V. Figure 10. Latch-Up Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 TYPICAL CHARACTERISTICS COLLECTOR-EMITTER SATURATION VOLTAGE vs TOTAL COLLECTOR CURRENT (TWO DARLINGTONS PARALLELED) COLLECTOR-EMITTER SATURATION VOLTAGE vs COLLECTOR CURRENT (ONE DARLINGTON) VCE(sat) VCE(sat) – Collector-Emitter Saturation Voltage – V VCE(sat) VCE(sat) – Collector-Emitter Saturation Voltage – V 2.5 TA = 25°C 2 II = 250 µA II = 350 µA II = 500 µA 1.5 1 0.5 0 0 100 200 300 400 500 600 700 800 2.5 TA = 25°C II = 250 µA 2 II = 350 µA 1.5 II = 500 µA 1 0.5 0 0 100 200 300 Figure 12 Figure 11 COLLECTOR CURRENT vs INPUT CURRENT 500 RL = 10 Ω TA = 25°C IIC C – Collector Current – mA 450 400 VS = 10 V 350 VS = 8 V 300 250 200 150 100 50 0 0 500 600 700 IC(tot) – Total Collector Current – mA IC – Collector Current – mA 25 50 75 100 125 150 II – Input Current – µA Figure 13 6 400 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 175 200 800 ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 THERMAL INFORMATION N PACKAGE MAXIMUM COLLECTOR CURRENT vs DUTY CYCLE D PACKAGE MAXIMUM COLLECTOR CURRENT vs DUTY CYCLE 600 IIC C – Maximum Collector Current – mA IIC C – Maximum Collector Current – mA 600 500 N=1 N=4 400 N=3 300 N=2 N=6 N=7 N=5 200 100 TA = 70°C N = Number of Outputs Conducting Simultaneously 500 N=1 N=3 N=2 400 N=4 300 N=5 N=6 N=7 200 100 TA = 85°C N = Number of Outputs Conducting Simultaneously 0 0 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 Duty Cycle – % Duty Cycle – % Figure 14 Figure 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 ULN2001A, ULN2002A, ULN2003A, ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 – DECEMBER 1976 – REVISED APRIL 1993 APPLICATION INFORMATION ULN2002A VSS P-MOS Output ULN2003A VCC V V 1 16 1 16 2 15 2 15 3 14 3 14 4 13 4 13 5 12 5 12 6 11 6 11 7 10 7 10 8 9 8 9 Lamp Test TTL Output Figure 16. P-MOS to Load ULN2004A VDD Figure 17. TTL to Load ULN2003A VCC V V 1 16 1 16 2 15 2 15 3 14 RP 3 14 4 13 4 13 5 12 5 12 6 11 6 11 7 10 7 10 8 9 8 9 CMOS Output TTL Output Figure 18. Buffer for Higher Current Loads 8 POST OFFICE BOX 655303 Figure 19. Use of Pullup Resistors to Increase Drive Current • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright  1998, Texas Instruments Incorporated This datasheet has been downloaded from: www.DatasheetCatalog.com Datasheets for electronic components.