Transcript
IRF840, SiHF840 Vishay Siliconix
Power MOSFET FEATURES
PRODUCT SUMMARY VDS (V)
• Dynamic dV/dt Rating
500
RDS(on) (Ω)
VGS = 10 V
Qg (Max.) (nC)
63
• Fast Switching
Qgs (nC)
9.3
• Ease of Paralleling
32
• Simple Drive Requirements
Qgd (nC) Configuration
Single
COMPLIANT
DESCRIPTION
TO-220
Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.
G
S D
RoHS*
• Lead (Pb)-free Available D
G
Available
• Repetitive Avalanche Rated
0.85
S N-Channel MOSFET
ORDERING INFORMATION Package
TO-220 IRF840PbF SiHF840-E3 IRF840 SiHF840
Lead (Pb)-free SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
VDS
500
V
Gate-Source Voltage
VGS
± 20
V
Continuous Drain Current
VGS at 10 V
TC = 25 °C TC = 100 °C
Pulsed Drain Currenta
ID
8.0 5.1
A
IDM
32 1.0
W/°C
Single Pulse Avalanche Energyb
EAS
510
mJ
Repetitive Avalanche Currenta
IAR
8.0
A
Repetitive Avalanche Energya
EAR
13
mJ
PD
125
W
dV/dt
3.5
V/ns
TJ, Tstg
- 55 to + 150
Linear Derating Factor
Maximum Power Dissipation Peak Diode Recovery
TC = 25 °C
dV/dtc
Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque
for 10 s 6-32 or M3 screw
300d
°C
10
lbf · in
1.1
N·m
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, RG = 25 Ω, IAS = 8.0 A (see fig. 12). c. ISD ≤ 8.0 A, dI/dt ≤ 100 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91070 S-81290-Rev. B, 16-Jun-08
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IRF840, SiHF840 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
1.0
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static Drain-Source Breakdown Voltage VDS Temperature Coefficient
VDS
VGS = 0 V, ID = 250 µA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.78
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 500 V, VGS = 0 V
-
-
25
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
Gate-Source Threshold Voltage
µA
-
-
0.85
Ω
gfs
VDS = 50 V, ID = 4.8 Ab
4.9
-
-
S
Input Capacitance
Ciss
VGS = 0 V,
-
1300
-
Output Capacitance
Coss
VDS = 25 V,
-
310
-
Reverse Transfer Capacitance
Crss
f = 1.0 MHz, see fig. 5
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Drain-Source On-State Resistance Forward Transconductance
RDS(on)
ID = 4.8 Ab
VGS = 10 V
Dynamic
VGS = 10 V
ID = 8 A, VDS = 400 V, see fig. 6 and 13b
-
120
-
-
-
63
-
-
9.3
pF
nC
Gate-Drain Charge
Qgd
-
-
32
Turn-On Delay Time
td(on)
-
14
-
-
23
-
-
49
-
-
20
-
-
4.5
-
-
7.5
-
-
-
8.0
-
-
32
-
-
2.0
V
-
460
970
ns
-
4.2
8.9
µC
Rise Time Turn-Off Delay Time Fall Time
tr td(off)
VDD = 250 V, ID = 8 A RG = 9.1 Ω, RD = 31 Ω, see fig. 10b
tf
Internal Drain Inductance
LD
Internal Source Inductance
LS
Between lead, 6 mm (0.25") from package and center of die contact
D
ns
nH
G
S
Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol showing the integral reverse p - n junction diode
D
A G
S
TJ = 25 °C, IS = 8 A, VGS = 0 Vb TJ = 25 °C, IF = 8 A, dI/dt = 100 A/µsb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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Document Number: 91070 S-81290-Rev. B, 16-Jun-08
IRF840, SiHF840 Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V
101
4.5 V 100
25 °C
100
20 µs Pulse Width VDS = 50 V
20 µs Pulse Width TC = 25 °C
100
4
101
VDS, Drain-to-Source Voltage (V)
91070_01
ID, Drain Current (A)
4.5 V
100
20 µs Pulse Width TC = 150 °C 100
91070_02
101
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Document Number: 91070 S-81290-Rev. B, 16-Jun-08
6
7
8
9
10
Fig. 3 - Typical Transfer Characteristics
RDS(on), Drain-to-Source On Resistance (Normalized)
VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top
5
VGS, Gate-to-Source Voltage (V)
91070_03
Fig. 1 - Typical Output Characteristics, TC = 25 °C
101
150 °C
101
ID, Drain Current (A)
ID, Drain Current (A)
Top
91070_04
3.0 2.5
ID = 8.0 A VGS = 10 V
2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRF840, SiHF840
2500
VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd
Capacitance (pF)
2000
Ciss
1500
1000 Coss 500 Crss
VGS = 0 V 0.4
102
ID, Drain Current (A)
VDS = 400 V VDS = 250 V VDS = 100 V
8
10 µs
2
10 100 µs 5
1 ms
2
1 10 ms 5
4 For test circuit see figure 13
0 0 91070_06
15
30
45
60
Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage
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TC = 25 °C TJ = 150 °C Single Pulse
2
0.1 0.1
75
QG, Total Gate Charge (nC)
1.4
1.2
1.0
Operation in this area limited by RDS(on)
5
16
0.8
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID = 8.0 A
12
0.6
VSD, Source-to-Drain Voltage (V)
91070_07
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
VGS, Gate-to-Source Voltage (V)
25 °C
101
VDS, Drain-to-Source Voltage (V)
20
150 °C 101
100
0 100 91070_05
ISD, Reverse Drain Current (A)
Vishay Siliconix
91070_08
2
5
1
2
5
10
2
5
102
2
5
103
2
5
104
VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area
Document Number: 91070 S-81290-Rev. B, 16-Jun-08
IRF840, SiHF840 Vishay Siliconix RD VDS VGS
8.0
D.U.T.
ID, Drain Current (A)
RG
6.0
+ - VDD
10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 %
4.0
Fig. 10a - Switching Time Test Circuit
2.0 VDS 90 % 0.0 25
50
75
100
125
150
TC, Case Temperature (°C)
91070_09
10 % VGS td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
10
1 0 - 0.5
0.2 0.1 0.1 0.05 0.02 0.01
PDM Single Pulse (Thermal Response)
t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC
10-2
10-3 10-5
10-4
10-3
10-2
0.1
1
102
10
t1, Rectangular Pulse Duration (S)
91070_11
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L Vary tp to obtain required IAS
VDS
VDS tp
VDD D.U.T.
RG
+ -
IAS
V DD
VDS
10 V tp
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91070 S-81290-Rev. B, 16-Jun-08
IAS Fig. 12b - Unclamped Inductive Waveforms
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IRF840, SiHF840 Vishay Siliconix
EAS, Single Pulse Energy (mJ)
1200 ID 3.6 A 5.1 A Bottom 8.0 A Top
1000 800 600 400 200 0
VDD = 50 V 25
91070_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T. 50 kΩ
QG
10 V
12 V
0.2 µF 0.3 µF
QGS
+
QGD
VG
D.U.T.
-
VDS
VGS 3 mA
Charge
Fig. 13a - Basic Gate Charge Waveform
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IG ID Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
Document Number: 91070 S-81290-Rev. B, 16-Jun-08
IRF840, SiHF840 Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit +
D.U.T.
Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer
+ -
-
RG
• • • •
dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test
Driver gate drive P.W.
+
Period
D=
+ -
VDD
P.W. Period VGS = 10 V*
D.U.T. ISD waveform Reverse recovery current
Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt
Re-applied voltage
VDD
Body diode forward drop Inductor current Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91070.
Document Number: 91070 S-81290-Rev. B, 16-Jun-08
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Legal Disclaimer Notice Vishay
Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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