Transcript
VPX- TJ1
DATASHEET
A benchtop test jig for development and test work on VPX cards
Facilitates easy access to circuitry for fault finding or debug during board operation
Supports up to 6.25 Gbaud serial data
KEY FEATURES RJ45 connectors for 1000BaseT Ethernet on VPX Control Plane ports CPutp01, CPutp02
RESULTING BENEFITS
Mini-SAS connectors and PCB suita- Supports 6.25 Gbaud serial data on VPX ble for high frequency signals P1 Lanes 9-12 Dual Ethernet interface to VPX Control Plane
Standard RJ-45 Gigabit Ethernet connections to P1 Lanes 15 and 16
VPX slot
Supports VPX and OpenVPX 0.8” and 1.0” pitch cards
Open access to VPX card
Allows easy probing and debug
5A or 10A current limit at 12V
Supports cards up to 120W power
Power status LEDs
Gives visual indication of board state
Current monitoring outputs
Allows easy management and payload current draw measurements
The CommAgility VPX-TJ1 test jig provides a comprehensive bench-top environment for VPX modules, allowing easy configuration and access to external ports.
CommAgility Ltd
[email protected] www.commagility.com Tel: +44 1509 228866
VPX slot: Allows stand-alone board test or functional testing with external equipment Also allows data fabric connections to another VPX in a second VPX-TJ1 Supports 3U cards with 0.8” and 1.0” pitch Power Supply: Requires external PC Mini-ITX PSU Un-managed hot-swap control 3V3 management power 12V main power, 5A or 10A selectable current limit Backplane I/O: RJ-45 Gigabit Ethernet to P1 Lanes 15, 16 MiniSAS connectors to P1 Lanes 9-12, rated up to 6.25 Gbaud RS-232 connector Geographic address headers REF_CLK header and onboard 100MHz oscillator I2C header JTAG header
VPX-TJ1
HARDWARE SPECIFICATIONS
Cooling: Air-cooled and conduction cooled versions available Dual fans
Power Terminal Block J3 P2 G15,G13 RS232
J5
SFP+ I2C P6, P7 Dual SFP+ Cage UTP1, UTP2
P2 Row G To Glue Logic
REF CLK SELECT J14
P9
P1 Lane[12:11] MiniSAS
+12V Payload Enable
P2 Lane[16] CLOCK IN/OUT
Xilinx BoB Header J17
J20
Payload Power 5A/10A Trip Select J11 JTAG Mode
JTAG Switch JTAG Config
P1 Lane[10:9] MiniSAS
P11
SYS_RESET
+3V3_AUX
XJTAG Header J24
ATMega Header J23
VPX I2C P15
AUX CLK DIRECTION J8 100MHz OSC
REF_CLK J15
SFP+ I2C P13, P14 IPMC_A
P2 Row A-F LVDS Loopback
VPX Slot
P1 Lane[16:15] SerDes
OEM PARTNERSHIP SERVICES:
AUX CLK J6
VS2 +3V3 VS3 +5V +12V AUX -12V AUX
Dual SFP+ Cage Ctp00, Ctp01
P1 Lane[14:13] SerDes
Fan Speed Control SW1
XDS510 BoB Header J10
P5
P1 Lane[8:5] MiniSAS
FAN
P3
P1 Lane[4:1] MiniSAS
Mini DIN Jack J50
Universal Power Jack J23
Environment and safety: Storage temperature -20 to +60°C Operating temperature 0 to 40°C 2011/65/EU RoHS, 2012/19/EU WEEE and EC/1907/2006 REACH compliant
Mode and GA Switch SW2 Status LEDs
Power Control
Power Terminal Block J30
ON/OFF Switch
IN DEVELOPMENT: Support and training; hardware customisation; software and FPGA development. IN PRODUCTION: lead-time reduction; extended warranty; and repair; quick turn repairs and/or spares stocking. EXTENDED LIFE: obsolescence management; guaranteed lifecycle; Escrow. LICENSING is offered for high volume projects.
CommAgility Ltd, Loughborough, UK Tel: +44 1509 228866
[email protected] www.commagility.com
Datasheet describes products in development by CommAgility. Information subject to change. VPX-TJ1 V2/0117
